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authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2016-08-25 12:20:46 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-10-31 05:02:12 -0600
commitb8ccb5004837bd1692ae3656ba9524ad8626967c (patch)
treede3628be14b737d805fa0d948c20b3521c693959
parent6b207c78fe60bb56f187f3c68a9387bd082bcb3e (diff)
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clk: gcc-msm8996: Fix pcie 2 pipe register offset
commit ce61966c05f276294b6be04d1765ad0d827ddefd upstream. This patch corrects the register offset for pcie2 pipe clock. Offset according to datasheet is 0x6e018 instead of 0x6e108. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Fixes: b1e010c0730a ("clk: qcom: Add MSM8996 Global Clock Control (GCC) driver") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/clk/qcom/gcc-msm8996.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c
index bbf732bbc3fd..9f643cca85d0 100644
--- a/drivers/clk/qcom/gcc-msm8996.c
+++ b/drivers/clk/qcom/gcc-msm8996.c
@@ -2592,9 +2592,9 @@ static struct clk_branch gcc_pcie_2_aux_clk = {
};
static struct clk_branch gcc_pcie_2_pipe_clk = {
- .halt_reg = 0x6e108,
+ .halt_reg = 0x6e018,
.clkr = {
- .enable_reg = 0x6e108,
+ .enable_reg = 0x6e018,
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "gcc_pcie_2_pipe_clk",