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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2006-04-04 17:34:14 +0900
committerRalf Baechle <ralf@linux-mips.org>2006-04-19 04:14:21 +0200
commit67a3f6de939a5f52e0aea6dcff7778d4bcca0734 (patch)
tree7a3579fa45f783ac3193e04cac6745086ff1637f
parent1cc89038f3921f4d79a9d24c8490aa9c0549e371 (diff)
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[MIPS] Fix tx49_blast_icache32_page_indexed.
Fix the cache index value in tx49_blast_icache32_page_indexed(). This is a damage by de62893bc0725f8b5f0445250577cd7a10b2d8f8 commit. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/mm/c-r4k.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 32b7f6aeb983..c4c208449d87 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -154,7 +154,8 @@ static inline void blast_icache32_r4600_v1_page_indexed(unsigned long page)
static inline void tx49_blast_icache32_page_indexed(unsigned long page)
{
- unsigned long start = page;
+ unsigned long indexmask = current_cpu_data.icache.waysize - 1;
+ unsigned long start = INDEX_BASE + (page & indexmask);
unsigned long end = start + PAGE_SIZE;
unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
unsigned long ws_end = current_cpu_data.icache.ways <<