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authorKhem Raj <raj.khem@gmail.com>2021-02-03 14:38:03 -0800
committerRichard Purdie <richard.purdie@linuxfoundation.org>2021-02-05 12:00:54 +0000
commit8e3b42f44217c9f868d6b8bd52808d357b516a2b (patch)
treee7af6cc7c371f8aad0c949cf827f95928df75157
parent51cf44884971d6fc919f2a799fb08ee61acf7518 (diff)
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glibc: Require full ISA support for x86-64 level markeruninative-2.11
(From OE-Core rev: 7f40096fabd4d8a1b67e96aabca6a15637501222) Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
-rw-r--r--meta/recipes-core/glibc/glibc/0031-x86-Require-full-ISA-support-for-x86-64-level-marker.patch116
-rw-r--r--meta/recipes-core/glibc/glibc_2.33.bb1
2 files changed, 117 insertions, 0 deletions
diff --git a/meta/recipes-core/glibc/glibc/0031-x86-Require-full-ISA-support-for-x86-64-level-marker.patch b/meta/recipes-core/glibc/glibc/0031-x86-Require-full-ISA-support-for-x86-64-level-marker.patch
new file mode 100644
index 0000000000..3cb60b2e55
--- /dev/null
+++ b/meta/recipes-core/glibc/glibc/0031-x86-Require-full-ISA-support-for-x86-64-level-marker.patch
@@ -0,0 +1,116 @@
+From b1971f6f1331d738d1d6b376b4741668a7546125 Mon Sep 17 00:00:00 2001
+From: "H.J. Lu" <hjl.tools@gmail.com>
+Date: Tue, 2 Feb 2021 13:45:58 -0800
+Subject: [PATCH] x86: Require full ISA support for x86-64 level marker [BZ #27318]
+
+Since -march=sandybridge enables ISAs in x86-64 ISA level v3, the v3
+marker is set on libc.so. We couldn't set the needed ISA marker to v2
+since this libc won't run on all v2 machines. Technically, the v3 marker
+is correct. But the resulting libc.so won't run on Sandy Brigde, which
+is a v2 machine, even when libc is compiled with -march=sandybridge:
+
+$ ./elf/ld.so ./libc.so
+./libc.so: (p) CPU ISA level is lower than required: needed: 7; got: 3
+
+Instead, we require full ISA support for x86-64 level marker and disable
+x86-64 level marker for -march=sandybridge which enables ISAs between v2
+and v3.
+
+Upstream-Status: Submitted [https://sourceware.org/pipermail/libc-alpha/2021-February/122297.html]
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+---
+
+ sysdeps/x86/configure | 7 ++++++-
+ sysdeps/x86/configure.ac | 2 +-
+ sysdeps/x86/isa-level.c | 21 ++++++++++++++++++++-
+ 3 files changed, 27 insertions(+), 3 deletions(-)
+
+diff --git a/sysdeps/x86/configure b/sysdeps/x86/configure
+index 5e32dc62b3..5b20646843 100644
+--- a/sysdeps/x86/configure
++++ b/sysdeps/x86/configure
+@@ -133,7 +133,12 @@ if { ac_try='${CC-cc} $CFLAGS $CPPFLAGS -nostartfiles -nostdlib -r -o conftest c
+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+ test $ac_status = 0; }; }; then
+ count=`LC_ALL=C $READELF -n conftest | grep NT_GNU_PROPERTY_TYPE_0 | wc -l`
+- if test "$count" = 1; then
++ if test "$count" = 1 && { ac_try='${CC-cc} $CFLAGS $CPPFLAGS -DINCLUDE_X86_ISA_LEVEL -S -o conftest.s $srcdir/sysdeps/x86/isa-level.c'
++ { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
++ (eval $ac_try) 2>&5
++ ac_status=$?
++ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++ test $ac_status = 0; }; }; then
+ libc_cv_include_x86_isa_level=yes
+ fi
+ fi
+diff --git a/sysdeps/x86/configure.ac b/sysdeps/x86/configure.ac
+index f94088f377..54ecd33d2c 100644
+--- a/sysdeps/x86/configure.ac
++++ b/sysdeps/x86/configure.ac
+@@ -100,7 +100,7 @@ EOF
+ libc_cv_include_x86_isa_level=no
+ if AC_TRY_COMMAND(${CC-cc} $CFLAGS $CPPFLAGS -nostartfiles -nostdlib -r -o conftest conftest1.S conftest2.S); then
+ count=`LC_ALL=C $READELF -n conftest | grep NT_GNU_PROPERTY_TYPE_0 | wc -l`
+- if test "$count" = 1; then
++ if test "$count" = 1 && AC_TRY_COMMAND(${CC-cc} $CFLAGS $CPPFLAGS -DINCLUDE_X86_ISA_LEVEL -S -o conftest.s $srcdir/sysdeps/x86/isa-level.c); then
+ libc_cv_include_x86_isa_level=yes
+ fi
+ fi
+diff --git a/sysdeps/x86/isa-level.c b/sysdeps/x86/isa-level.c
+index aaf524cb56..7f83449061 100644
+--- a/sysdeps/x86/isa-level.c
++++ b/sysdeps/x86/isa-level.c
+@@ -25,12 +25,17 @@
+ License along with the GNU C Library; if not, see
+ <https://www.gnu.org/licenses/>. */
+
+-#include <elf.h>
++#ifdef _LIBC
++# include <elf.h>
++#endif
+
+ /* ELF program property for x86 ISA level. */
+ #ifdef INCLUDE_X86_ISA_LEVEL
+ # if defined __x86_64__ || defined __FXSR__ || !defined _SOFT_FLOAT \
+ || defined __MMX__ || defined __SSE__ || defined __SSE2__
++# if !defined __SSE__ || !defined __SSE2__
++# error "Missing ISAs for x86-64 ISA level baseline"
++# endif
+ # define ISA_BASELINE GNU_PROPERTY_X86_ISA_1_BASELINE
+ # else
+ # define ISA_BASELINE 0
+@@ -40,6 +45,11 @@
+ || (defined __x86_64__ && defined __LAHF_SAHF__) \
+ || defined __POPCNT__ || defined __SSE3__ \
+ || defined __SSSE3__ || defined __SSE4_1__ || defined __SSE4_2__
++# if !defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 \
++ || !defined __POPCNT__ || !defined __SSE3__ \
++ || !defined __SSSE3__ || !defined __SSE4_1__ || !defined __SSE4_2__
++# error "Missing ISAs for x86-64 ISA level v2"
++# endif
+ # define ISA_V2 GNU_PROPERTY_X86_ISA_1_V2
+ # else
+ # define ISA_V2 0
+@@ -48,6 +58,10 @@
+ # if defined __AVX__ || defined __AVX2__ || defined __F16C__ \
+ || defined __FMA__ || defined __LZCNT__ || defined __MOVBE__ \
+ || defined __XSAVE__
++# if !defined __AVX__ || !defined __AVX2__ || !defined __F16C__ \
++ || !defined __FMA__ || !defined __LZCNT__
++# error "Missing ISAs for x86-64 ISA level v3"
++# endif
+ # define ISA_V3 GNU_PROPERTY_X86_ISA_1_V3
+ # else
+ # define ISA_V3 0
+@@ -55,6 +69,11 @@
+
+ # if defined __AVX512F__ || defined __AVX512BW__ || defined __AVX512CD__ \
+ || defined __AVX512DQ__ || defined __AVX512VL__
++# if !defined __AVX512F__ || !defined __AVX512BW__ \
++ || !defined __AVX512CD__ || !defined __AVX512DQ__ \
++ || !defined __AVX512VL__
++# error "Missing ISAs for x86-64 ISA level v4"
++# endif
+ # define ISA_V4 GNU_PROPERTY_X86_ISA_1_V4
+ # else
+ # define ISA_V4 0
diff --git a/meta/recipes-core/glibc/glibc_2.33.bb b/meta/recipes-core/glibc/glibc_2.33.bb
index b39f97d656..4085c779eb 100644
--- a/meta/recipes-core/glibc/glibc_2.33.bb
+++ b/meta/recipes-core/glibc/glibc_2.33.bb
@@ -42,6 +42,7 @@ SRC_URI = "${GLIBC_GIT_URI};branch=${SRCBRANCH};name=glibc \
file://0028-readlib-Add-OECORE_KNOWN_INTERPRETER_NAMES-to-known-.patch \
file://0029-wordsize.h-Unify-the-header-between-arm-and-aarch64.patch \
file://0030-powerpc-Do-not-ask-compiler-for-finding-arch.patch \
+ file://0031-x86-Require-full-ISA-support-for-x86-64-level-marker.patch \
"
S = "${WORKDIR}/git"
B = "${WORKDIR}/build-${TARGET_SYS}"