diff options
| -rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/binutils/binutils%.bbappend | 2 | ||||
| -rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0001-MicroBlaze-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch (renamed from meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0001-MicroBlaze-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch) | 10 | ||||
| -rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0002-MicroBlaze-add-mlittle-endian-and-mbig-endian-flags.patch (renamed from meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0002-MicroBlaze-add-mlittle-endian-and-mbig-endian-flags.patch) | 8 | ||||
| -rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0003-Disable-the-warning-message-for-eh_frame_hdr.patch (renamed from meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0003-Disable-the-warning-message-for-eh_frame_hdr.patch) | 10 | ||||
| -rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0004-Fix-relaxation-of-assembler-resolved-references.patch (renamed from meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0004-Fix-relaxation-of-assembler-resolved-references.patch) | 61 | ||||
| -rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0005-Fixup-MicroBlaze-debug_loc-sections-after-linker-rel.patch (renamed from meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0005-Fixup-MicroBlaze-debug_loc-sections-after-linker-rel.patch) | 102 | ||||
| -rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0006-Fix-bug-in-MicroBlaze-TLSTPREL-Relocation.patch (renamed from meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0006-Fix-bug-in-MicroBlaze-TLSTPREL-Relocation.patch) | 10 | ||||
| -rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0007-Add-MicroBlaze-address-extension-instructions.patch (renamed from meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0007-Add-MicroBlaze-address-extension-instructions.patch) | 10 | ||||
| -rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0008-Add-new-MicroBlaze-bit-field-instructions.patch (renamed from meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0008-Add-new-MicroBlaze-bit-field-instructions.patch) | 0 | ||||
| -rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0009-Fixing-MicroBlaze-IMM-bug.patch (renamed from meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0009-Fixing-MicroBlaze-IMM-bug.patch) | 12 | ||||
| -rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0010-Fixed-bug-in-GCC-so-that-it-will-support-.long-0U-an.patch (renamed from meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0010-Fixed-bug-in-GCC-so-that-it-will-support-.long-0U-an.patch) | 8 | ||||
| -rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0011-Fixing-MicroBlaze-constant-range-check-issue.patch (renamed from meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0011-Fixing-MicroBlaze-constant-range-check-issue.patch) | 8 | ||||
| -rw-r--r-- | meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0012-MicroBlaze-fix-mask-for-barrel-shift-instructions.patch (renamed from meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0012-MicroBlaze-fix-mask-for-barrel-shift-instructions.patch) | 8 |
13 files changed, 120 insertions, 129 deletions
diff --git a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils%.bbappend b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils%.bbappend index 17843185..795c6717 100644 --- a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils%.bbappend +++ b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils%.bbappend @@ -1,4 +1,4 @@ -FILESEXTRAPATHS_append_microblaze := "${THISDIR}/binutils-2.29:" +FILESEXTRAPATHS_append_microblaze := "${THISDIR}/binutils-2.30:" SRC_URI_append_microblaze = " \ file://0001-MicroBlaze-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \ file://0002-MicroBlaze-add-mlittle-endian-and-mbig-endian-flags.patch \ diff --git a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0001-MicroBlaze-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0001-MicroBlaze-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch index 193061a3..878bb321 100644 --- a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0001-MicroBlaze-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch +++ b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0001-MicroBlaze-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch @@ -1,4 +1,4 @@ -From d2979c539c309347493cebae91dc455fa3368f4f Mon Sep 17 00:00:00 2001 +From 91f39b692c48336117c092e4afd80899c97779e6 Mon Sep 17 00:00:00 2001 From: David Holsgrove <david.holsgrove@xilinx.com> Date: Mon, 28 Aug 2017 19:53:52 -0700 Subject: [PATCH] MicroBlaze Add wdc.ext.clear and wdc.ext.flush insns @@ -11,13 +11,14 @@ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> Upstream-Status: Pending + --- opcodes/microblaze-opc.h | 5 ++++- opcodes/microblaze-opcm.h | 4 ++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index 3954f927d1..b33178145f 100644 +index ede8af8..773dc81 100644 --- a/opcodes/microblaze-opc.h +++ b/opcodes/microblaze-opc.h @@ -91,6 +91,7 @@ @@ -48,7 +49,7 @@ index 3954f927d1..b33178145f 100644 {"mfs", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst }, {"br", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst }, diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h -index 6b25173442..00dc131302 100644 +index 92f3f19..7338f6a 100644 --- a/opcodes/microblaze-opcm.h +++ b/opcodes/microblaze-opcm.h @@ -33,8 +33,8 @@ enum microblaze_instr @@ -62,6 +63,3 @@ index 6b25173442..00dc131302 100644 bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni, imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid, brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, --- -2.15.0 - diff --git a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0002-MicroBlaze-add-mlittle-endian-and-mbig-endian-flags.patch b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0002-MicroBlaze-add-mlittle-endian-and-mbig-endian-flags.patch index c8142ca4..edeecfd2 100644 --- a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0002-MicroBlaze-add-mlittle-endian-and-mbig-endian-flags.patch +++ b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0002-MicroBlaze-add-mlittle-endian-and-mbig-endian-flags.patch @@ -1,4 +1,4 @@ -From 90fa3cca5ce8ca19c9aca521bbc3d47485f02bf1 Mon Sep 17 00:00:00 2001 +From 8b733a61ab54ba4cedb234020562502d20eebcbb Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala <nagaraju.mekala@xilinx.com> Date: Mon, 28 Aug 2017 19:53:53 -0700 Subject: [PATCH] MicroBlaze add mlittle-endian and mbig-endian flags @@ -13,12 +13,13 @@ Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> Upstream-Status: Pending + --- gas/config/tc-microblaze.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 0124422168..d47793646b 100644 +index 0194cd9..42dd7ae 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -37,6 +37,8 @@ @@ -61,6 +62,3 @@ index 0124422168..d47793646b 100644 } --- -2.15.0 - diff --git a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0003-Disable-the-warning-message-for-eh_frame_hdr.patch b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0003-Disable-the-warning-message-for-eh_frame_hdr.patch index 55f4ce33..2b30c467 100644 --- a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0003-Disable-the-warning-message-for-eh_frame_hdr.patch +++ b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0003-Disable-the-warning-message-for-eh_frame_hdr.patch @@ -1,4 +1,4 @@ -From f81026057270346cfcfa16e460dcb04a9fa48511 Mon Sep 17 00:00:00 2001 +From dac72d809be9faf9380b181df0c19a2c6d744c54 Mon Sep 17 00:00:00 2001 From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> Date: Mon, 28 Aug 2017 19:53:54 -0700 Subject: [PATCH] Disable the warning message for eh_frame_hdr @@ -6,15 +6,16 @@ Subject: [PATCH] Disable the warning message for eh_frame_hdr Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> Upstream-Status: Inappropriate [workaround] + --- bfd/elf-eh-frame.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c -index 52ba9c6213..7ac511dfcb 100644 +index 95697c4..704121d 100644 --- a/bfd/elf-eh-frame.c +++ b/bfd/elf-eh-frame.c -@@ -1046,10 +1046,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info, +@@ -1042,10 +1042,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info, goto success; free_no_table: @@ -31,6 +32,3 @@ index 52ba9c6213..7ac511dfcb 100644 hdr_info->u.dwarf.table = FALSE; if (sec_info) free (sec_info); --- -2.15.0 - diff --git a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0004-Fix-relaxation-of-assembler-resolved-references.patch b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0004-Fix-relaxation-of-assembler-resolved-references.patch index c145a746..b543c54e 100644 --- a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0004-Fix-relaxation-of-assembler-resolved-references.patch +++ b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0004-Fix-relaxation-of-assembler-resolved-references.patch @@ -1,24 +1,30 @@ -From 0d5966951c379882b7557befaa229dc5def8dafe Mon Sep 17 00:00:00 2001 +From 927ef228dfedf229dc915b273a308ab2c7bf9e19 Mon Sep 17 00:00:00 2001 From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> Date: Mon, 28 Aug 2017 19:53:55 -0700 Subject: [PATCH] Fix relaxation of assembler resolved references +03/2018 +Rebased for binutils 2.30 + Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> +Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com> + Upstream-Status: Pending + --- bfd/elf32-microblaze.c | 39 +++++++++++++++++++++++++++++++++++++++ gas/config/tc-microblaze.c | 1 + 2 files changed, 40 insertions(+) diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index 265773675c..c3dbead48d 100644 +index f1808bc..a1d810c 100644 --- a/bfd/elf32-microblaze.c +++ b/bfd/elf32-microblaze.c -@@ -1901,6 +1901,45 @@ microblaze_elf_relax_section (bfd *abfd, - irelscanend = irelocs + o->reloc_count; - for (irelscan = irelocs; irelscan < irelscanend; irelscan++) - { +@@ -1887,6 +1887,45 @@ microblaze_elf_relax_section (bfd *abfd, + irelscanend = irelocs + o->reloc_count; + for (irelscan = irelocs; irelscan < irelscanend; irelscan++) + { + if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE) + { + unsigned int val; @@ -28,26 +34,26 @@ index 265773675c..c3dbead48d 100644 + /* This was a PC-relative instruction that was completely resolved. */ + if (ocontents == NULL) + { -+ if (elf_section_data (o)->this_hdr.contents != NULL) -+ ocontents = elf_section_data (o)->this_hdr.contents; -+ else -+ { -+ /* We always cache the section contents. -+ Perhaps, if info->keep_memory is FALSE, we -+ should free them, if we are permitted to. */ ++ if (elf_section_data (o)->this_hdr.contents != NULL) ++ ocontents = elf_section_data (o)->this_hdr.contents; ++ else ++ { ++ /* We always cache the section contents. ++ Perhaps, if info->keep_memory is FALSE, we ++ should free them, if we are permitted to. */ + -+ if (o->rawsize == 0) -+ o->rawsize = o->size; -+ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); -+ if (ocontents == NULL) -+ goto error_return; -+ if (!bfd_get_section_contents (abfd, o, ocontents, ++ if (o->rawsize == 0) ++ o->rawsize = o->size; ++ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); ++ if (ocontents == NULL) ++ goto error_return; ++ if (!bfd_get_section_contents (abfd, o, ocontents, + (file_ptr) 0, + o->rawsize)) + goto error_return; -+ elf_section_data (o)->this_hdr.contents = ocontents; -+ } -+ } ++ elf_section_data (o)->this_hdr.contents = ocontents; ++ } ++ } + + irelscan->r_addend -= calc_fixup (irelscan->r_addend + + isym->st_value, sec); @@ -58,11 +64,11 @@ index 265773675c..c3dbead48d 100644 + if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_NONE) { + fprintf(stderr, "Unhandled NONE 64\n"); + } - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) - { - isym = isymbuf + ELF32_R_SYM (irelscan->r_info); + if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) + { + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index d47793646b..1cfd441c19 100644 +index 42dd7ae..50dbfc7 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -2183,6 +2183,7 @@ md_apply_fix (fixS * fixP, @@ -73,6 +79,3 @@ index d47793646b..1cfd441c19 100644 } return; } --- -2.15.0 - diff --git a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0005-Fixup-MicroBlaze-debug_loc-sections-after-linker-rel.patch b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0005-Fixup-MicroBlaze-debug_loc-sections-after-linker-rel.patch index 9eeb0b28..3817234b 100644 --- a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0005-Fixup-MicroBlaze-debug_loc-sections-after-linker-rel.patch +++ b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0005-Fixup-MicroBlaze-debug_loc-sections-after-linker-rel.patch @@ -1,4 +1,4 @@ -From ef876d5062148e8555353e5e72da87c3a47dea8f Mon Sep 17 00:00:00 2001 +From 5bf68bc39976903929f730b6eed18686c3563c05 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala <nagaraju.mekala@xilinx.com> Date: Mon, 28 Aug 2017 19:53:56 -0700 Subject: [PATCH] Fixup MicroBlaze debug_loc sections after linker relaxation @@ -11,25 +11,31 @@ reference. This is a workaround for design flaws in the assembler to linker interface with regards to linker relaxation. +03/2018 +Rebased for binutils 2.30 + Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> +Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com> + Upstream-Status: Pending + --- bfd/bfd-in2.h | 9 +++++++-- - bfd/elf32-microblaze.c | 42 +++++++++++++++++++++++++++++++++++------- + bfd/elf32-microblaze.c | 45 ++++++++++++++++++++++++++++++++++++++------- bfd/libbfd.h | 1 + bfd/reloc.c | 6 ++++++ binutils/readelf.c | 4 ++++ gas/config/tc-microblaze.c | 5 ++++- include/elf/microblaze.h | 1 + - 7 files changed, 58 insertions(+), 10 deletions(-) + 7 files changed, 61 insertions(+), 10 deletions(-) diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h -index 1343780c8c..3456826f83 100644 +index 4228603..1906195 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h -@@ -5809,10 +5809,15 @@ value relative to the read-write small data area anchor */ +@@ -5826,10 +5826,15 @@ value relative to the read-write small data area anchor */ expressions of the form "Symbol Op Symbol" */ BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM, @@ -48,12 +54,12 @@ index 1343780c8c..3456826f83 100644 /* This is a 64 bit reloc that stores the 32 bit pc relative value in two words (with an imm instruction). The relocation is diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index c3dbead48d..1d1f7e210a 100644 +index a1d810c..fc0d3e1 100644 --- a/bfd/elf32-microblaze.c +++ b/bfd/elf32-microblaze.c @@ -176,6 +176,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = - 0x0000ffff, /* Dest Mask. */ - FALSE), /* PC relative offset? */ + 0x0000ffff, /* Dest Mask. */ + FALSE), /* PC relative offset? */ + HOWTO (R_MICROBLAZE_32_NONE, /* Type. */ + 0, /* Rightshift. */ @@ -69,9 +75,9 @@ index c3dbead48d..1d1f7e210a 100644 + 0, /* Dest Mask. */ + FALSE), /* PC relative offset? */ + - /* This reloc does nothing. Used for relaxation. */ + /* This reloc does nothing. Used for relaxation. */ HOWTO (R_MICROBLAZE_64_NONE, /* Type. */ - 0, /* Rightshift. */ + 0, /* Rightshift. */ @@ -532,6 +546,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, case BFD_RELOC_NONE: microblaze_reloc = R_MICROBLAZE_NONE; @@ -82,33 +88,34 @@ index c3dbead48d..1d1f7e210a 100644 case BFD_RELOC_MICROBLAZE_64_NONE: microblaze_reloc = R_MICROBLAZE_64_NONE; break; -@@ -1846,14 +1863,22 @@ microblaze_elf_relax_section (bfd *abfd, - } +@@ -1832,14 +1849,23 @@ microblaze_elf_relax_section (bfd *abfd, + } break; case R_MICROBLAZE_NONE: -+ case R_MICROBLAZE_32_NONE: ++ case R_MICROBLAZE_32_NONE: { - /* This was a PC-relative instruction that was - completely resolved. */ - int sfix, efix; + /* This was a PC-relative instruction that was + completely resolved. */ + int sfix, efix; + unsigned int val; - bfd_vma target_address; - target_address = irel->r_addend + irel->r_offset; - sfix = calc_fixup (irel->r_offset, 0, sec); - efix = calc_fixup (target_address, 0, sec); + bfd_vma target_address; + target_address = irel->r_addend + irel->r_offset; + sfix = calc_fixup (irel->r_offset, 0, sec); + efix = calc_fixup (target_address, 0, sec); + + /* Validate the in-band val. */ + val = bfd_get_32 (abfd, contents + irel->r_offset); + if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { + fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); + } - irel->r_addend -= (efix - sfix); - /* Should use HOWTO. */ - microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, -@@ -1901,12 +1926,16 @@ microblaze_elf_relax_section (bfd *abfd, - irelscanend = irelocs + o->reloc_count; - for (irelscan = irelocs; irelscan < irelscanend; irelscan++) - { ++ + irel->r_addend -= (efix - sfix); + /* Should use HOWTO. */ + microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, +@@ -1887,12 +1913,16 @@ microblaze_elf_relax_section (bfd *abfd, + irelscanend = irelocs + o->reloc_count; + for (irelscan = irelocs; irelscan < irelscanend; irelscan++) + { - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE) + if (1 && ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE) { @@ -123,27 +130,29 @@ index c3dbead48d..1d1f7e210a 100644 /* This was a PC-relative instruction that was completely resolved. */ if (ocontents == NULL) { -@@ -1931,15 +1960,14 @@ microblaze_elf_relax_section (bfd *abfd, - } - } +@@ -1917,15 +1947,16 @@ microblaze_elf_relax_section (bfd *abfd, + } + } - irelscan->r_addend -= calc_fixup (irelscan->r_addend - + isym->st_value, sec); val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); ++ + if (val != irelscan->r_addend) { + fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend); + } + irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec); ++ microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, irelscan->r_addend); } - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_NONE) { - fprintf(stderr, "Unhandled NONE 64\n"); - } - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) - { - isym = isymbuf + ELF32_R_SYM (irelscan->r_info); -@@ -1999,7 +2027,7 @@ microblaze_elf_relax_section (bfd *abfd, + if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) + { + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); +@@ -1985,7 +2016,7 @@ microblaze_elf_relax_section (bfd *abfd, elf_section_data (o)->this_hdr.contents = ocontents; } } @@ -153,10 +162,10 @@ index c3dbead48d..1d1f7e210a 100644 0, sec); diff --git a/bfd/libbfd.h b/bfd/libbfd.h -index ae9bf76814..2091286c7c 100644 +index 2f5f16e..854bb0c 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h -@@ -2847,6 +2847,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", +@@ -2853,6 +2853,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_MICROBLAZE_32_ROSDA", "BFD_RELOC_MICROBLAZE_32_RWSDA", "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", @@ -165,27 +174,27 @@ index ae9bf76814..2091286c7c 100644 "BFD_RELOC_MICROBLAZE_64_GOTPC", "BFD_RELOC_MICROBLAZE_64_GOT", diff --git a/bfd/reloc.c b/bfd/reloc.c -index aa70fa5874..54d7f538ec 100644 +index a1353a2..4b57de7 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c -@@ -6860,6 +6860,12 @@ ENUM - ENUMDOC +@@ -6903,6 +6903,12 @@ ENUMDOC This is a 32 bit reloc for the microblaze to handle expressions of the form "Symbol Op Symbol" -+ENUM + ENUM + BFD_RELOC_MICROBLAZE_32_NONE +ENUMDOC + This is a 32 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). No relocation is + done here - only used for relaxing - ENUM ++ENUM BFD_RELOC_MICROBLAZE_64_NONE ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative diff --git a/binutils/readelf.c b/binutils/readelf.c -index b2f75c0048..8a3226eba9 100644 +index fed0387..92f655d 100644 --- a/binutils/readelf.c +++ b/binutils/readelf.c -@@ -12488,6 +12488,10 @@ is_none_reloc (unsigned int reloc_type) +@@ -12774,6 +12774,10 @@ is_none_reloc (Filedata * filedata, unsigned int reloc_type) || reloc_type == 32 /* R_AVR_DIFF32. */); case EM_METAG: return reloc_type == 3; /* R_METAG_NONE. */ @@ -197,7 +206,7 @@ index b2f75c0048..8a3226eba9 100644 return (reloc_type == 0 /* R_XTENSA_NONE. */ || reloc_type == 204 /* R_NDS32_DIFF8. */ diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 1cfd441c19..e135547e62 100644 +index 50dbfc7..d66e949 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -2179,7 +2179,9 @@ md_apply_fix (fixS * fixP, @@ -220,7 +229,7 @@ index 1cfd441c19..e135547e62 100644 case BFD_RELOC_32: case BFD_RELOC_MICROBLAZE_32_LO: diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h -index ccb47404c5..abcaea561b 100644 +index ae98099..c8cc57b 100644 --- a/include/elf/microblaze.h +++ b/include/elf/microblaze.h @@ -58,6 +58,7 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) @@ -231,6 +240,3 @@ index ccb47404c5..abcaea561b 100644 END_RELOC_NUMBERS (R_MICROBLAZE_max) --- -2.15.0 - diff --git a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0006-Fix-bug-in-MicroBlaze-TLSTPREL-Relocation.patch b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0006-Fix-bug-in-MicroBlaze-TLSTPREL-Relocation.patch index de458adb..a671cf84 100644 --- a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0006-Fix-bug-in-MicroBlaze-TLSTPREL-Relocation.patch +++ b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0006-Fix-bug-in-MicroBlaze-TLSTPREL-Relocation.patch @@ -1,4 +1,4 @@ -From b55dddad1303aafe249e2ba0ddf20460f8f035f6 Mon Sep 17 00:00:00 2001 +From 0cad227ce495a975b32c10a8b6b0970c45024dd6 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala <nagaraju.mekala@xilinx.com> Date: Mon, 28 Aug 2017 19:53:58 -0700 Subject: [PATCH] Fix bug in MicroBlaze TLSTPREL Relocation @@ -12,15 +12,16 @@ big & little-endian compilers Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> Upstream-Status: Pending + --- bfd/elf32-microblaze.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index 1d1f7e210a..cc6e4b1fd9 100644 +index fc0d3e1..a94799f 100644 --- a/bfd/elf32-microblaze.c +++ b/bfd/elf32-microblaze.c -@@ -1417,9 +1417,9 @@ microblaze_elf_relocate_section (bfd *output_bfd, +@@ -1402,9 +1402,9 @@ microblaze_elf_relocate_section (bfd *output_bfd, relocation += addend; relocation -= dtprel_base(info); bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, @@ -32,6 +33,3 @@ index 1d1f7e210a..cc6e4b1fd9 100644 break; case (int) R_MICROBLAZE_64_PCREL : case (int) R_MICROBLAZE_64: --- -2.15.0 - diff --git a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0007-Add-MicroBlaze-address-extension-instructions.patch b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0007-Add-MicroBlaze-address-extension-instructions.patch index ad62345c..9672c516 100644 --- a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0007-Add-MicroBlaze-address-extension-instructions.patch +++ b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0007-Add-MicroBlaze-address-extension-instructions.patch @@ -1,4 +1,4 @@ -From 82c8eacbceb51422d3da75ac30912f9dedc0e832 Mon Sep 17 00:00:00 2001 +From 3895968b5c55321d203cadb7630a2baee8699e17 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala <nagaraju.mekala@xilinx.com> Date: Mon, 28 Aug 2017 19:53:59 -0700 Subject: [PATCH] Add MicroBlaze address extension instructions @@ -14,13 +14,14 @@ for supporting Address extension feature. Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> Upstream-Status: Pending + --- opcodes/microblaze-opc.h | 13 ++++++++++++- opcodes/microblaze-opcm.h | 10 +++++----- 2 files changed, 17 insertions(+), 6 deletions(-) diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index b33178145f..a64f8362da 100644 +index 773dc81..4e69f76 100644 --- a/opcodes/microblaze-opc.h +++ b/opcodes/microblaze-opc.h @@ -102,7 +102,7 @@ @@ -79,7 +80,7 @@ index b33178145f..a64f8362da 100644 {"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst }, {"", 0, 0, 0, 0, 0, 0, 0, 0}, diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h -index 00dc131302..21a3dc8d76 100644 +index 7338f6a..c75f10a 100644 --- a/opcodes/microblaze-opcm.h +++ b/opcodes/microblaze-opcm.h @@ -33,13 +33,13 @@ enum microblaze_instr @@ -101,6 +102,3 @@ index 00dc131302..21a3dc8d76 100644 sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, fint, fsqrt, --- -2.15.0 - diff --git a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0008-Add-new-MicroBlaze-bit-field-instructions.patch b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0008-Add-new-MicroBlaze-bit-field-instructions.patch index 0bc01177..0bc01177 100644 --- a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0008-Add-new-MicroBlaze-bit-field-instructions.patch +++ b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0008-Add-new-MicroBlaze-bit-field-instructions.patch diff --git a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0009-Fixing-MicroBlaze-IMM-bug.patch b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0009-Fixing-MicroBlaze-IMM-bug.patch index 0eef0f0d..bb7e91cc 100644 --- a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0009-Fixing-MicroBlaze-IMM-bug.patch +++ b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0009-Fixing-MicroBlaze-IMM-bug.patch @@ -1,4 +1,4 @@ -From cff770a6f73b82db3259e9577e13b08a1bcd14e8 Mon Sep 17 00:00:00 2001 +From f649406ccaea992f3931e0d9ca9fbd6efb0c553b Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala <nagaraju.mekala@xilinx.com> Date: Mon, 28 Aug 2017 19:54:02 -0700 Subject: [PATCH] Fixing MicroBlaze IMM bug @@ -8,15 +8,16 @@ Fixing the imm bug. with relax option imm -1 is also getting removed this is cor Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> Upstream-Status: Pending + --- bfd/elf32-microblaze.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index cc6e4b1fd9..6fc475cbcd 100644 +index a94799f..74b00d2 100644 --- a/bfd/elf32-microblaze.c +++ b/bfd/elf32-microblaze.c -@@ -1803,8 +1803,7 @@ microblaze_elf_relax_section (bfd *abfd, +@@ -1789,8 +1789,7 @@ microblaze_elf_relax_section (bfd *abfd, else symval += irel->r_addend; @@ -24,8 +25,5 @@ index cc6e4b1fd9..6fc475cbcd 100644 - || (symval & 0xffff8000) == 0xffff8000) + if ((symval & 0xffff8000) == 0) { - /* We can delete this instruction. */ + /* We can delete this instruction. */ sec->relax[sec->relax_count].addr = irel->r_offset; --- -2.15.0 - diff --git a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0010-Fixed-bug-in-GCC-so-that-it-will-support-.long-0U-an.patch b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0010-Fixed-bug-in-GCC-so-that-it-will-support-.long-0U-an.patch index e08bedc7..077343e6 100644 --- a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0010-Fixed-bug-in-GCC-so-that-it-will-support-.long-0U-an.patch +++ b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0010-Fixed-bug-in-GCC-so-that-it-will-support-.long-0U-an.patch @@ -1,4 +1,4 @@ -From 4449e15997a576761433cc76daf3635742acec62 Mon Sep 17 00:00:00 2001 +From e1bacaa7c1aa387f167afff74876c5acdffc39d9 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati <mbodapat@xilinx.com> Date: Wed, 15 Nov 2017 17:45:35 -0800 Subject: [PATCH] Fixed bug in GCC so that it will support .long 0U and .long @@ -7,12 +7,13 @@ Subject: [PATCH] Fixed bug in GCC so that it will support .long 0U and .long Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> Upstream-Status: Pending + --- gas/expr.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/gas/expr.c b/gas/expr.c -index 6fc707b8a5..a54b1f4b76 100644 +index 3e28af6..0b7cc76 100644 --- a/gas/expr.c +++ b/gas/expr.c @@ -810,6 +810,15 @@ operand (expressionS *expressionP, enum expr_mode mode) @@ -31,6 +32,3 @@ index 6fc707b8a5..a54b1f4b76 100644 c = *input_line_pointer; switch (c) { --- -2.15.0 - diff --git a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0011-Fixing-MicroBlaze-constant-range-check-issue.patch b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0011-Fixing-MicroBlaze-constant-range-check-issue.patch index fe940905..244a7ade 100644 --- a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0011-Fixing-MicroBlaze-constant-range-check-issue.patch +++ b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0011-Fixing-MicroBlaze-constant-range-check-issue.patch @@ -1,4 +1,4 @@ -From 4286d83d6dc58131982247f7017b738595329771 Mon Sep 17 00:00:00 2001 +From 9393a3e346d2ccbb86761117260c1dd89070a507 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala <nagaraju.mekala@xilinx.com> Date: Wed, 15 Nov 2017 17:45:34 -0800 Subject: [PATCH] Fixing MicroBlaze constant range check issue @@ -8,12 +8,13 @@ Sample error: not in range ffffffff80000000..7fffffff, not ffffffff70000000 Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> Upstream-Status: Pending + --- gas/config/tc-microblaze.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 34cb80fac2..7e1233945a 100644 +index 21a5a0c..c614556 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -749,7 +749,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max) @@ -25,6 +26,3 @@ index 34cb80fac2..7e1233945a 100644 { as_fatal (_("operand must be absolute in range %lx..%lx, not %lx"), (long) min, (long) max, (long) e->X_add_number); --- -2.15.0 - diff --git a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0012-MicroBlaze-fix-mask-for-barrel-shift-instructions.patch b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0012-MicroBlaze-fix-mask-for-barrel-shift-instructions.patch index 1028c50a..e340c506 100644 --- a/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.29/0012-MicroBlaze-fix-mask-for-barrel-shift-instructions.patch +++ b/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.30/0012-MicroBlaze-fix-mask-for-barrel-shift-instructions.patch @@ -1,4 +1,4 @@ -From a3ce2a329f583a66732b6a435c1bd76a83732dd8 Mon Sep 17 00:00:00 2001 +From 732b5a44a0a032da5ebb775b5df2ee2a36af988f Mon Sep 17 00:00:00 2001 From: Nathan Rossi <nathan@nathanrossi.com> Date: Sun, 5 Nov 2017 22:17:39 +1000 Subject: [PATCH] MicroBlaze fix mask for barrel shift instructions @@ -12,12 +12,13 @@ bsifi instructions. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Upstream-Status: Pending + --- opcodes/microblaze-opc.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index afb34989d9..68db818d69 100644 +index 4bc400a..9482d81 100644 --- a/opcodes/microblaze-opc.h +++ b/opcodes/microblaze-opc.h @@ -161,9 +161,9 @@ struct op_code_struct @@ -33,6 +34,3 @@ index afb34989d9..68db818d69 100644 {"bsefi", INST_TYPE_RD_R1_IMM5_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64004000, OPCODE_MASK_H32B, bsefi, barrel_shift_inst }, {"bsifi", INST_TYPE_RD_R1_IMM5_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64008000, OPCODE_MASK_H32B, bsifi, barrel_shift_inst }, {"or", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000000, OPCODE_MASK_H4, microblaze_or, logical_inst }, --- -2.15.0 - |