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From d2f023c883e3a8b999ee9b4b43ee784152159e5c Mon Sep 17 00:00:00 2001
From: Eric Yang <eric.yang2@amd.com>
Date: Wed, 16 Mar 2016 16:38:28 -0400
Subject: [PATCH 0907/1110] drm/amd/dal: fix division by 0 on boot for dce80
DCE80 used to have bandwidth parameters initialized with the dce110
numbers. This was taken out a while ago, leaving the parameters to
be uninitialized. This causes division by 0 on boot. This change
resolves this by skipping bandwidth calculation and displaymark
programming. For now, we will have dce80 always running safemark
Reviewed-by: Eagle Yeh <eagle.yeh@amd.com>
Signed-off-by: Eric Yang <eric.yang2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
.../gpu/drm/amd/dal/dc/dce80/dce80_hw_sequencer.c | 7 +
drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c | 169 +--------------------
2 files changed, 10 insertions(+), 166 deletions(-)
diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_hw_sequencer.c b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_hw_sequencer.c
index caec585..02d7508 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_hw_sequencer.c
@@ -291,6 +291,12 @@ static bool dce80_enable_display_power_gating(
return false;
}
+static void set_displaymarks(
+ const struct core_dc *dc, struct validate_context *context)
+{
+ /* Do nothing until we have proper bandwitdth calcs */
+}
+
bool dce80_hw_sequencer_construct(struct core_dc *dc)
{
dce110_hw_sequencer_construct(dc);
@@ -300,6 +306,7 @@ bool dce80_hw_sequencer_construct(struct core_dc *dc)
dc->hwss.enable_display_power_gating = dce80_enable_display_power_gating;
dc->hwss.pipe_control_lock = dce80_pipe_control_lock;
dc->hwss.set_blender_mode = dce80_set_blender_mode;
+ dc->hwss.set_displaymarks = set_displaymarks;
return true;
}
diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c
index 594f9ab..311f5fa 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c
@@ -718,173 +718,10 @@ enum dc_status dce80_validate_bandwidth(
const struct core_dc *dc,
struct validate_context *context)
{
- uint8_t i;
- enum dc_status result = DC_ERROR_UNEXPECTED;
- uint8_t number_of_displays = 0;
- uint8_t max_htaps = 1;
- uint8_t max_vtaps = 1;
- bool all_displays_in_sync = true;
- struct dc_crtc_timing prev_timing;
-
- memset(&context->bw_mode_data, 0, sizeof(context->bw_mode_data));
-
- for (i = 0; i < MAX_PIPES; i++) {
- struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
- struct bw_calcs_input_single_display *disp = &context->
- bw_mode_data.displays_data[number_of_displays];
-
- if (pipe_ctx->stream == NULL)
- continue;
-
- if (pipe_ctx->scl_data.ratios.vert.value == 0) {
- disp->graphics_scale_ratio = bw_int_to_fixed(1);
- disp->graphics_h_taps = 2;
- disp->graphics_v_taps = 2;
-
- /* TODO: remove when bw formula accepts taps per
- * display
- */
- if (max_vtaps < 2)
- max_vtaps = 2;
- if (max_htaps < 2)
- max_htaps = 2;
-
- } else {
- disp->graphics_scale_ratio =
- fixed31_32_to_bw_fixed(
- pipe_ctx->scl_data.ratios.vert.value);
- disp->graphics_h_taps = pipe_ctx->scl_data.taps.h_taps;
- disp->graphics_v_taps = pipe_ctx->scl_data.taps.v_taps;
-
- /* TODO: remove when bw formula accepts taps per
- * display
- */
- if (max_vtaps < pipe_ctx->scl_data.taps.v_taps)
- max_vtaps = pipe_ctx->scl_data.taps.v_taps;
- if (max_htaps < pipe_ctx->scl_data.taps.h_taps)
- max_htaps = pipe_ctx->scl_data.taps.h_taps;
- }
-
- disp->graphics_src_width =
- pipe_ctx->stream->public.timing.h_addressable;
- disp->graphics_src_height =
- pipe_ctx->stream->public.timing.v_addressable;
- disp->h_total = pipe_ctx->stream->public.timing.h_total;
- disp->pixel_rate = bw_frc_to_fixed(
- pipe_ctx->stream->public.timing.pix_clk_khz, 1000);
-
- /*TODO: get from surface*/
- disp->graphics_bytes_per_pixel = 4;
- disp->graphics_tiling_mode = bw_def_tiled;
-
- /* DCE11 defaults*/
- disp->graphics_lb_bpc = 10;
- disp->graphics_interlace_mode = false;
- disp->fbc_enable = false;
- disp->lpt_enable = false;
- disp->graphics_stereo_mode = bw_def_mono;
- disp->underlay_mode = bw_def_none;
-
- /*All displays will be synchronized if timings are all
- * the same
- */
- if (number_of_displays != 0 && all_displays_in_sync)
- if (memcmp(&prev_timing,
- &pipe_ctx->stream->public.timing,
- sizeof(struct dc_crtc_timing)) != 0)
- all_displays_in_sync = false;
- if (number_of_displays == 0)
- prev_timing = pipe_ctx->stream->public.timing;
-
- number_of_displays++;
- }
+ /* TODO implement when needed but for now hardcode max value*/
+ context->bw_results.dispclk_khz = 681000;
- /* TODO: remove when bw formula accepts taps per
- * display
- */
- context->bw_mode_data.displays_data[0].graphics_v_taps = max_vtaps;
- context->bw_mode_data.displays_data[0].graphics_h_taps = max_htaps;
-
- context->bw_mode_data.number_of_displays = number_of_displays;
- context->bw_mode_data.display_synchronization_enabled =
- all_displays_in_sync;
-
- dal_logger_write(
- dc->ctx->logger,
- LOG_MAJOR_BWM,
- LOG_MINOR_BWM_REQUIRED_BANDWIDTH_CALCS,
- "%s: start",
- __func__);
-
- if (!bw_calcs(
- dc->ctx,
- &dc->bw_dceip,
- &dc->bw_vbios,
- &context->bw_mode_data,
- &context->bw_results))
- result = DC_FAIL_BANDWIDTH_VALIDATE;
- else
- result = DC_OK;
-
- if (result == DC_FAIL_BANDWIDTH_VALIDATE)
- dal_logger_write(dc->ctx->logger,
- LOG_MAJOR_BWM,
- LOG_MINOR_BWM_MODE_VALIDATION,
- "%s: Bandwidth validation failed!",
- __func__);
-
- if (memcmp(&dc->current_context.bw_results,
- &context->bw_results, sizeof(context->bw_results))) {
- struct log_entry log_entry;
- dal_logger_open(
- dc->ctx->logger,
- &log_entry,
- LOG_MAJOR_BWM,
- LOG_MINOR_BWM_REQUIRED_BANDWIDTH_CALCS);
- dal_logger_append(&log_entry, "%s: finish, numDisplays: %d\n"
- "nbpMark_b: %d nbpMark_a: %d urgentMark_b: %d urgentMark_a: %d\n"
- "stutMark_b: %d stutMark_a: %d\n",
- __func__, number_of_displays,
- context->bw_results.nbp_state_change_wm_ns[0].b_mark,
- context->bw_results.nbp_state_change_wm_ns[0].a_mark,
- context->bw_results.urgent_wm_ns[0].b_mark,
- context->bw_results.urgent_wm_ns[0].a_mark,
- context->bw_results.stutter_exit_wm_ns[0].b_mark,
- context->bw_results.stutter_exit_wm_ns[0].a_mark);
- dal_logger_append(&log_entry,
- "nbpMark_b: %d nbpMark_a: %d urgentMark_b: %d urgentMark_a: %d\n"
- "stutMark_b: %d stutMark_a: %d\n",
- context->bw_results.nbp_state_change_wm_ns[1].b_mark,
- context->bw_results.nbp_state_change_wm_ns[1].a_mark,
- context->bw_results.urgent_wm_ns[1].b_mark,
- context->bw_results.urgent_wm_ns[1].a_mark,
- context->bw_results.stutter_exit_wm_ns[1].b_mark,
- context->bw_results.stutter_exit_wm_ns[1].a_mark);
- dal_logger_append(&log_entry,
- "nbpMark_b: %d nbpMark_a: %d urgentMark_b: %d urgentMark_a: %d\n"
- "stutMark_b: %d stutMark_a: %d stutter_mode_enable: %d\n",
- context->bw_results.nbp_state_change_wm_ns[2].b_mark,
- context->bw_results.nbp_state_change_wm_ns[2].a_mark,
- context->bw_results.urgent_wm_ns[2].b_mark,
- context->bw_results.urgent_wm_ns[2].a_mark,
- context->bw_results.stutter_exit_wm_ns[2].b_mark,
- context->bw_results.stutter_exit_wm_ns[2].a_mark,
- context->bw_results.stutter_mode_enable);
- dal_logger_append(&log_entry,
- "cstate: %d pstate: %d nbpstate: %d sync: %d dispclk: %d\n"
- "sclk: %d sclk_sleep: %d yclk: %d blackout_duration: %d\n",
- context->bw_results.cpuc_state_change_enable,
- context->bw_results.cpup_state_change_enable,
- context->bw_results.nbp_state_change_enable,
- context->bw_results.all_displays_in_sync,
- context->bw_results.dispclk_khz,
- context->bw_results.required_sclk,
- context->bw_results.required_sclk_deep_sleep,
- context->bw_results.required_yclk,
- context->bw_results.required_blackout_duration_us);
- dal_logger_close(&log_entry);
- }
- return result;
+ return DC_OK;
}
static void set_target_unchanged(
--
2.7.4
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