blob: 1dcf9861ce4d44828b97cb004a7bea4c165bacbb (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
|
From 946650b1bc9918336e22eb81f7994fd4742ed1f1 Mon Sep 17 00:00:00 2001
From: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Date: Fri, 12 Feb 2016 11:42:41 -0500
Subject: [PATCH 0806/1110] drm/amd/dal: Reset unreference clock when switching
streams.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
---
drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c
index 810f6d5..4e73ad1 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c
@@ -776,9 +776,13 @@ static enum dc_status apply_single_controller_ctx_to_hw(
/*
* only disable stream in case it was ever enabled
*/
- if (old_pipe_ctx->stream)
+ if (old_pipe_ctx->stream) {
core_link_disable_stream(old_pipe_ctx);
+ ASSERT(old_pipe_ctx->clock_source);
+ unreference_clock_source(&dc->current_context.res_ctx, old_pipe_ctx->clock_source);
+ }
+
/*TODO: AUTO check if timing changed*/
if (false == pipe_ctx->clock_source->funcs->program_pix_clk(
pipe_ctx->clock_source,
@@ -1499,6 +1503,8 @@ static void reset_single_pipe_hw_ctx(
dc->hwss.enable_display_power_gating(
pipe_ctx->stream->ctx, pipe_ctx->pipe_idx, dcb,
PIPE_GATING_CONTROL_ENABLE);
+
+ pipe_ctx->stream = NULL;
}
static void reset_hw_ctx(
--
2.7.4
|
