blob: 731d6956295b5bd58cd829f3602a7ea6b3900d1d (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
|
From 3805fc85c45ff9620df53013182205d30d7e12e6 Mon Sep 17 00:00:00 2001
From: David Rokhvarg <David.Rokhvarg@amd.com>
Date: Fri, 11 Dec 2015 12:06:25 -0500
Subject: [PATCH 0132/1110] drm/amdgpu/powerplay: Program a calculated value as
Deep Sleep clock.
This replaces programming of a hardcoded value.
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
index 4641095..3448065 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
@@ -789,9 +789,11 @@ static int cz_tf_set_deep_sleep_sclk_threshold(struct pp_hwmgr *hwmgr,
if (clks == 0)
clks = CZ_MIN_DEEP_SLEEP_SCLK;
+ PP_DBG_LOG("Setting Deep Sleep Clock: %d\n", clks);
+
smum_send_msg_to_smc_with_parameter(hwmgr->smumgr,
- PPSMC_MSG_SetMinDeepSleepSclk,
- CZ_MIN_DEEP_SLEEP_SCLK);
+ PPSMC_MSG_SetMinDeepSleepSclk,
+ clks);
}
return 0;
--
2.7.4
|
