From 9355b7d47bafc14da1944d323db96cb5b32af968 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Thu, 15 Oct 2015 15:21:09 -0400 Subject: [PATCH 0916/1110] drm/amdgpu: add ELM/BAF support to dce_v11_0_pick_pll MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit New PLL scheme on ELM/BAF. Reviewed-by: Christian König Signed-off-by: Alex Deucher Reviewed-by: Jammy Zhou --- drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c index 53e338b..92a242a 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c @@ -2384,6 +2384,18 @@ static u32 dce_v11_0_pick_pll(struct drm_crtc *crtc) u32 pll_in_use; int pll; + if ((adev->asic_type == CHIP_ELLESMERE) || + (adev->asic_type == CHIP_BAFFIN)) { + if (ENCODER_MODE_IS_DP(amdgpu_atombios_encoder_get_encoder_mode(amdgpu_crtc->encoder))) + return ATOM_DP_DTO; + /* use the same PPLL for all monitors with the same clock */ + pll = amdgpu_pll_get_shared_nondp_ppll(crtc); + if (pll != ATOM_PPLL_INVALID) + return pll; + + return ATOM_COMBOPHY_PLL0 + amdgpu_crtc->crtc_id; + } + if (ENCODER_MODE_IS_DP(amdgpu_atombios_encoder_get_encoder_mode(amdgpu_crtc->encoder))) { if (adev->clock.dp_extclk) /* skip PPLL programming if using ext clock */ -- 2.7.4