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-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1047-drm-amd-powerplay-refine-powerplay-code-for-RV.patch234
1 files changed, 234 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1047-drm-amd-powerplay-refine-powerplay-code-for-RV.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1047-drm-amd-powerplay-refine-powerplay-code-for-RV.patch
new file mode 100644
index 00000000..748ab423
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/1047-drm-amd-powerplay-refine-powerplay-code-for-RV.patch
@@ -0,0 +1,234 @@
+From 84d0ea7ed060da1df26f8b0cdc38442723578a9d Mon Sep 17 00:00:00 2001
+From: Rex Zhu <Rex.Zhu@amd.com>
+Date: Mon, 4 Sep 2017 18:11:52 +0800
+Subject: [PATCH 1047/4131] drm/amd/powerplay: refine powerplay code for RV
+
+use function points instand of function table.
+
+Change-Id: I5b1e733481aac04b831255334e2102b2c9350531
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
+Signed-off-by: Kalyan Alle <kalyan.alle@amd.com>
+---
+ drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c | 137 ++++++-------------------
+ 1 file changed, 33 insertions(+), 104 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
+index 4976bd3..5d170b2 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
+@@ -157,8 +157,7 @@ static int rv_construct_boot_state(struct pp_hwmgr *hwmgr)
+ return 0;
+ }
+
+-static int rv_tf_set_clock_limit(struct pp_hwmgr *hwmgr, void *input,
+- void *output, void *storage, int result)
++static int rv_set_clock_limit(struct pp_hwmgr *hwmgr, const void *input)
+ {
+ struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend);
+ struct PP_Clocks clocks = {0};
+@@ -235,19 +234,12 @@ static int rv_set_active_display_count(struct pp_hwmgr *hwmgr, uint32_t count)
+ return 0;
+ }
+
+-static const struct phm_master_table_item rv_set_power_state_list[] = {
+- { .tableFunction = rv_tf_set_clock_limit },
+- { }
+-};
+-
+-static const struct phm_master_table_header rv_set_power_state_master = {
+- 0,
+- PHM_MasterTableFlag_None,
+- rv_set_power_state_list
+-};
++static int rv_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input)
++{
++ return rv_set_clock_limit(hwmgr, input);
++}
+
+-static int rv_tf_init_power_gate_state(struct pp_hwmgr *hwmgr, void *input,
+- void *output, void *storage, int result)
++static int rv_init_power_gate_state(struct pp_hwmgr *hwmgr)
+ {
+ struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend);
+
+@@ -258,20 +250,13 @@ static int rv_tf_init_power_gate_state(struct pp_hwmgr *hwmgr, void *input,
+ return 0;
+ }
+
+-static const struct phm_master_table_item rv_setup_asic_list[] = {
+- { .tableFunction = rv_tf_init_power_gate_state },
+- { }
+-};
+
+-static const struct phm_master_table_header rv_setup_asic_master = {
+- 0,
+- PHM_MasterTableFlag_None,
+- rv_setup_asic_list
+-};
++static int rv_setup_asic_task(struct pp_hwmgr *hwmgr)
++{
++ return rv_init_power_gate_state(hwmgr);
++}
+
+-static int rv_tf_reset_cc6_data(struct pp_hwmgr *hwmgr,
+- void *input, void *output,
+- void *storage, int result)
++static int rv_reset_cc6_data(struct pp_hwmgr *hwmgr)
+ {
+ struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend);
+
+@@ -283,21 +268,12 @@ static int rv_tf_reset_cc6_data(struct pp_hwmgr *hwmgr,
+ return 0;
+ }
+
+-static const struct phm_master_table_item rv_power_down_asic_list[] = {
+- { .tableFunction = rv_tf_reset_cc6_data },
+- { }
+-};
+-
+-static const struct phm_master_table_header rv_power_down_asic_master = {
+- 0,
+- PHM_MasterTableFlag_None,
+- rv_power_down_asic_list
+-};
+-
++static int rv_power_off_asic(struct pp_hwmgr *hwmgr)
++{
++ return rv_reset_cc6_data(hwmgr);
++}
+
+-static int rv_tf_disable_gfx_off(struct pp_hwmgr *hwmgr,
+- void *input, void *output,
+- void *storage, int result)
++static int rv_disable_gfx_off(struct pp_hwmgr *hwmgr)
+ {
+ struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend);
+
+@@ -308,21 +284,12 @@ static int rv_tf_disable_gfx_off(struct pp_hwmgr *hwmgr,
+ return 0;
+ }
+
+-static const struct phm_master_table_item rv_disable_dpm_list[] = {
+- { .tableFunction = rv_tf_disable_gfx_off },
+- { },
+-};
+-
+-
+-static const struct phm_master_table_header rv_disable_dpm_master = {
+- 0,
+- PHM_MasterTableFlag_None,
+- rv_disable_dpm_list
+-};
++static int rv_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
++{
++ return rv_disable_gfx_off(hwmgr);
++}
+
+-static int rv_tf_enable_gfx_off(struct pp_hwmgr *hwmgr,
+- void *input, void *output,
+- void *storage, int result)
++static int rv_enable_gfx_off(struct pp_hwmgr *hwmgr)
+ {
+ struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend);
+
+@@ -333,16 +300,10 @@ static int rv_tf_enable_gfx_off(struct pp_hwmgr *hwmgr,
+ return 0;
+ }
+
+-static const struct phm_master_table_item rv_enable_dpm_list[] = {
+- { .tableFunction = rv_tf_enable_gfx_off },
+- { },
+-};
+-
+-static const struct phm_master_table_header rv_enable_dpm_master = {
+- 0,
+- PHM_MasterTableFlag_None,
+- rv_enable_dpm_list
+-};
++static int rv_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
++{
++ return rv_enable_gfx_off(hwmgr);
++}
+
+ static int rv_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
+ struct pp_power_state *prequest_ps,
+@@ -495,6 +456,9 @@ static int rv_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
+
+ hwmgr->backend = data;
+
++ phm_cap_set(hwmgr->platform_descriptor.platformCaps,
++ PHM_PlatformCaps_TablelessHardwareInterface);
++
+ result = rv_initialize_dpm_defaults(hwmgr);
+ if (result != 0) {
+ pr_err("rv_initialize_dpm_defaults failed\n");
+@@ -511,40 +475,6 @@ static int rv_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
+
+ rv_construct_boot_state(hwmgr);
+
+- result = phm_construct_table(hwmgr, &rv_setup_asic_master,
+- &(hwmgr->setup_asic));
+- if (result != 0) {
+- pr_err("Fail to construct setup ASIC\n");
+- return result;
+- }
+-
+- result = phm_construct_table(hwmgr, &rv_power_down_asic_master,
+- &(hwmgr->power_down_asic));
+- if (result != 0) {
+- pr_err("Fail to construct power down ASIC\n");
+- return result;
+- }
+-
+- result = phm_construct_table(hwmgr, &rv_set_power_state_master,
+- &(hwmgr->set_power_state));
+- if (result != 0) {
+- pr_err("Fail to construct set_power_state\n");
+- return result;
+- }
+-
+- result = phm_construct_table(hwmgr, &rv_disable_dpm_master,
+- &(hwmgr->disable_dynamic_state_management));
+- if (result != 0) {
+- pr_err("Fail to disable_dynamic_state\n");
+- return result;
+- }
+- result = phm_construct_table(hwmgr, &rv_enable_dpm_master,
+- &(hwmgr->enable_dynamic_state_management));
+- if (result != 0) {
+- pr_err("Fail to enable_dynamic_state\n");
+- return result;
+- }
+-
+ hwmgr->platform_descriptor.hardwareActivityPerformanceLevels =
+ RAVEN_MAX_HARDWARE_POWERLEVELS;
+
+@@ -567,12 +497,6 @@ static int rv_hwmgr_backend_fini(struct pp_hwmgr *hwmgr)
+ struct rv_hwmgr *rv_data = (struct rv_hwmgr *)(hwmgr->backend);
+ struct rv_clock_voltage_information *pinfo = &(rv_data->clock_vol_info);
+
+- phm_destroy_table(hwmgr, &(hwmgr->set_power_state));
+- phm_destroy_table(hwmgr, &(hwmgr->enable_dynamic_state_management));
+- phm_destroy_table(hwmgr, &(hwmgr->disable_dynamic_state_management));
+- phm_destroy_table(hwmgr, &(hwmgr->power_down_asic));
+- phm_destroy_table(hwmgr, &(hwmgr->setup_asic));
+-
+ kfree(pinfo->vdd_dep_on_dcefclk);
+ pinfo->vdd_dep_on_dcefclk = NULL;
+ kfree(pinfo->vdd_dep_on_socclk);
+@@ -1037,6 +961,11 @@ static const struct pp_hwmgr_func rv_hwmgr_funcs = {
+ .read_sensor = rv_read_sensor,
+ .set_active_display_count = rv_set_active_display_count,
+ .set_deep_sleep_dcefclk = rv_set_deep_sleep_dcefclk,
++ .dynamic_state_management_enable = rv_enable_dpm_tasks,
++ .power_off_asic = rv_power_off_asic,
++ .asic_setup = rv_setup_asic_task,
++ .power_state_set = rv_set_power_state_tasks,
++ .dynamic_state_management_disable = rv_disable_dpm_tasks,
+ };
+
+ int rv_init_function_pointers(struct pp_hwmgr *hwmgr)
+--
+2.7.4
+
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-04-19 15:24:58 +0000