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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0844-drm-amdgpu-Rework-ptrace-access-function.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0844-drm-amdgpu-Rework-ptrace-access-function.patch150
1 files changed, 150 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0844-drm-amdgpu-Rework-ptrace-access-function.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0844-drm-amdgpu-Rework-ptrace-access-function.patch
new file mode 100644
index 00000000..1086104f
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0844-drm-amdgpu-Rework-ptrace-access-function.patch
@@ -0,0 +1,150 @@
+From 1c74f10b54f3f603797dcd1b9db3e516b4f2eb7c Mon Sep 17 00:00:00 2001
+From: Felix Kuehling <Felix.Kuehling@amd.com>
+Date: Wed, 12 Jul 2017 17:08:28 -0400
+Subject: [PATCH 0844/4131] drm/amdgpu: Rework ptrace access function
+
+This is based on code review feedback from the amd-gfx:
+
+* Move common code and system memory handling into TTM
+* Handle VRAM and optionally private pools in driver callback
+* Kmap only system memory pages that are accessed, one page at a time
+* Swap in system memory BOs if needed
+* Add range check
+
+Change-Id: Id01a6675b2af9bd3400416c18b66c1baefc1c4f1
+Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
+Signed-off-by: Kalyan Alle <kalyan.alle@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 109 +-------------------------------
+ 1 file changed, 1 insertion(+), 108 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+index 94e7611..9ae5fda 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+@@ -1567,113 +1567,7 @@ void amdgpu_ttm_set_active_vram_size(struct amdgpu_device *adev, u64 size)
+ }
+
+ static struct vm_operations_struct amdgpu_ttm_vm_ops;
+-static const struct vm_operations_struct *ttm_vm_ops /* = NULL;
+- * (appease checkpatch) */;
+-static int amdgpu_ttm_bo_access_vram(struct amdgpu_bo *abo,
+- unsigned long offset,
+- void *buf, int len, int write)
+-{
+- struct amdgpu_device *adev = amdgpu_ttm_adev(abo->tbo.bdev);
+- struct drm_mm_node *nodes = abo->tbo.mem.mm_node;
+- uint32_t value = 0;
+- int result = 0;
+- uint64_t pos;
+- unsigned long flags;
+-
+- while (offset >= (nodes->size << PAGE_SHIFT)) {
+- offset -= nodes->size << PAGE_SHIFT;
+- ++nodes;
+- }
+- pos = (nodes->start << PAGE_SHIFT) + offset;
+-
+- while (len && pos < adev->mc.mc_vram_size) {
+- uint64_t aligned_pos = pos & ~(uint64_t)3;
+- uint32_t bytes = 4 - (pos & 3);
+- uint32_t shift = (pos & 3) * 8;
+- uint32_t mask = 0xffffffff << shift;
+-
+- if (len < bytes) {
+- mask &= 0xffffffff >> (bytes - len) * 8;
+- bytes = len;
+- }
+-
+- spin_lock_irqsave(&adev->mmio_idx_lock, flags);
+- WREG32(mmMM_INDEX, ((uint32_t)aligned_pos) | 0x80000000);
+- WREG32(mmMM_INDEX_HI, aligned_pos >> 31);
+- if (!write || mask != 0xffffffff)
+- value = RREG32(mmMM_DATA);
+- if (write) {
+- value &= ~mask;
+- value |= (*(uint32_t *)buf << shift) & mask;
+- WREG32(mmMM_DATA, value);
+- }
+- spin_unlock_irqrestore(&adev->mmio_idx_lock, flags);
+- if (!write) {
+- value = (value & mask) >> shift;
+- memcpy(buf, &value, bytes);
+- }
+-
+- result += bytes;
+- buf = (uint8_t *)buf + bytes;
+- pos += bytes;
+- len -= bytes;
+- if (pos >= (nodes->start + nodes->size) << PAGE_SHIFT) {
+- ++nodes;
+- pos = (nodes->start << PAGE_SHIFT);
+- }
+- }
+-
+- return result;
+-}
+-
+-static int amdgpu_ttm_bo_access_kmap(struct amdgpu_bo *abo,
+- unsigned long offset,
+- void *buf, int len, int write)
+-{
+- struct ttm_buffer_object *bo = &abo->tbo;
+- struct ttm_bo_kmap_obj map;
+- void *ptr;
+- bool is_iomem;
+- int r;
+-
+- r = ttm_bo_kmap(bo, 0, bo->num_pages, &map);
+- if (r)
+- return r;
+- ptr = (uint8_t *)ttm_kmap_obj_virtual(&map, &is_iomem) + offset;
+- WARN_ON(is_iomem);
+- if (write)
+- memcpy(ptr, buf, len);
+- else
+- memcpy(buf, ptr, len);
+- ttm_bo_kunmap(&map);
+-
+- return len;
+-}
+-
+-static int amdgpu_ttm_vm_access(struct vm_area_struct *vma, unsigned long addr,
+- void *buf, int len, int write)
+-{
+- unsigned long offset = (addr) - vma->vm_start;
+- struct ttm_buffer_object *bo = vma->vm_private_data;
+- struct amdgpu_bo *abo = container_of(bo, struct amdgpu_bo, tbo);
+- unsigned domain;
+- int result;
+-
+- result = amdgpu_bo_reserve(abo, false);
+- if (result != 0)
+- return result;
+-
+- domain = amdgpu_mem_type_to_domain(bo->mem.mem_type);
+- if (domain == AMDGPU_GEM_DOMAIN_VRAM)
+- result = amdgpu_ttm_bo_access_vram(abo, offset,
+- buf, len, write);
+- else
+- result = amdgpu_ttm_bo_access_kmap(abo, offset,
+- buf, len, write);
+- amdgpu_bo_unreserve(abo);
+-
+- return len;
+-}
++static const struct vm_operations_struct *ttm_vm_ops;
+
+ int amdgpu_bo_mmap(struct file *filp, struct vm_area_struct *vma,
+ struct ttm_bo_device *bdev)
+@@ -1687,7 +1581,6 @@ int amdgpu_bo_mmap(struct file *filp, struct vm_area_struct *vma,
+ if (unlikely(ttm_vm_ops == NULL)) {
+ ttm_vm_ops = vma->vm_ops;
+ amdgpu_ttm_vm_ops = *ttm_vm_ops;
+- amdgpu_ttm_vm_ops.access = &amdgpu_ttm_vm_access;
+ }
+ vma->vm_ops = &amdgpu_ttm_vm_ops;
+
+--
+2.7.4
+