1 files changed, 0 insertions, 86 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0736-drm-amd-display-Add-more-pstate-sanity-checks.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0736-drm-amd-display-Add-more-pstate-sanity-checks.patch
deleted file mode 100644
index 9320c1d5..00000000
--- a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0736-drm-amd-display-Add-more-pstate-sanity-checks.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From 50a5490a4826fa7034d36cc1403e1069c40e7218 Mon Sep 17 00:00:00 2001
-From: Corbin McElhanney <corbin.mcelhanney@amd.com>
-Date: Thu, 3 Aug 2017 14:20:14 -0400
-Subject: [PATCH 0736/4131] drm/amd/display: Add more pstate sanity checks
-
-Signed-off-by: Corbin McElhanney <corbin.mcelhanney@amd.com>
-Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
-Acked-by: Harry Wentland <Harry.Wentland@amd.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
----
- .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c  | 24 ++++++++++++++++++++++
- 1 file changed, 24 insertions(+)
-
-diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
-index a4c0c33..114dd27 100644
---- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
-+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
-@@ -1767,6 +1767,10 @@ static void dcn10_power_on_fe(
- 	struct dc_plane_state *plane_state = pipe_ctx->plane_state;
- 	struct dce_hwseq *hws = dc->hwseq;
- 
-+	if (dc->public.debug.sanity_checks) {
-+		verify_allow_pstate_change_high(dc->hwseq);
-+	}
-+
- 	power_on_plane(dc->hwseq,
- 		pipe_ctx->pipe_idx);
- 
-@@ -1813,6 +1817,10 @@ static void dcn10_power_on_fe(
- 				pipe_ctx->plane_res.scl_data.recout.y);
- 		print_rq_dlg_ttu(dc, pipe_ctx);
- 	}
-+
-+	if (dc->public.debug.sanity_checks) {
-+		verify_allow_pstate_change_high(dc->hwseq);
-+	}
- }
- 
- static void program_gamut_remap(struct pipe_ctx *pipe_ctx)
-@@ -2287,6 +2295,10 @@ static void dcn10_set_bandwidth(
- {
- 	struct dm_pp_clock_for_voltage_req clock;
- 
-+	if (dc->public.debug.sanity_checks) {
-+		verify_allow_pstate_change_high(dc->hwseq);
-+	}
-+
- 	if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment))
- 		return;
- 
-@@ -2338,6 +2350,10 @@ static void dcn10_set_bandwidth(
- 	}
- 	dcn10_pplib_apply_display_requirements(dc, context);
- 
-+	if (dc->public.debug.sanity_checks) {
-+		verify_allow_pstate_change_high(dc->hwseq);
-+	}
-+
- 	/* need to fix this function.  not doing the right thing here */
- }
- 
-@@ -2459,6 +2475,10 @@ static void dcn10_wait_for_mpcc_disconnect(
- {
- 	int i;
- 
-+	if (dc->public.debug.sanity_checks) {
-+		verify_allow_pstate_change_high(dc->hwseq);
-+	}
-+
- 	if (!pipe_ctx->stream_res.opp)
- 		return;
- 
-@@ -2473,6 +2493,10 @@ static void dcn10_wait_for_mpcc_disconnect(
- 		}
- 	}
- 
-+	if (dc->public.debug.sanity_checks) {
-+		verify_allow_pstate_change_high(dc->hwseq);
-+	}
-+
- }
- 
- static bool dcn10_dummy_display_power_gating(
--- 
-2.7.4
-