diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0715-drm-amd-display-Move-mi-ipp-xfm-to-plane_res.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0715-drm-amd-display-Move-mi-ipp-xfm-to-plane_res.patch | 683 |
1 files changed, 0 insertions, 683 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0715-drm-amd-display-Move-mi-ipp-xfm-to-plane_res.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0715-drm-amd-display-Move-mi-ipp-xfm-to-plane_res.patch deleted file mode 100644 index 9b185fc7..00000000 --- a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0715-drm-amd-display-Move-mi-ipp-xfm-to-plane_res.patch +++ /dev/null @@ -1,683 +0,0 @@ -From ada38ec6f41c3862e85ec7d5bc987bed6e27b702 Mon Sep 17 00:00:00 2001 -From: Harry Wentland <harry.wentland@amd.com> -Date: Sun, 30 Jul 2017 11:55:55 -0400 -Subject: [PATCH 0715/4131] drm/amd/display: Move mi, ipp, xfm to plane_res - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/\.mi/\.plane_res.mi/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/->mi/->plane_res.mi/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/\.ipp/\.plane_res.ipp/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/->ipp/->plane_res.ipp/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/\.xfm/\.plane_res.xfm/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/->xfm/->plane_res.xfm/g' - -To clean up bad renames: - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/\.plane_res\.min/\.min/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/->plane_res\.min/->min/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/->plane_res\.mic/->mic/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/\.plane_res\.mis/\.mis/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/->plane_res\.mid/->mid/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/\.plane_res\.mid/\.mid/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/->plane_res\.mis/->mis/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/\.plane_res\.min/\.min/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/->plane_res\.min/->min/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/->plane_res\.mic/->mic/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/\.plane_res\.mis/\.mis/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/->plane_res\.mid/->mid/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/\.plane_res\.mid/\.mid/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/->plane_res\.mis/->mis/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/\.plane_res\.ipps/\.ipps/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/mpcc_cfg\.plane_res\.mi/mpcc_cfg\.mi/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/mi->plane_res\./mi->/g' - -find -name Makefile -o -name Kconfig -o -name "*.c" -o -name "*.h" \ --o -name "*.cpp" -o -name "*.hpp" | \ -xargs sed -i 's/cfg->plane_res\./cfg->/g' - -Signed-off-by: Harry Wentland <harry.wentland@amd.com> -Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> -Acked-by: Harry Wentland <Harry.Wentland@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 6 +- - drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 20 +++--- - drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 10 +-- - .../amd/display/dc/dce110/dce110_hw_sequencer.c | 80 +++++++++++----------- - .../drm/amd/display/dc/dce110/dce110_resource.c | 8 +-- - .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 40 +++++------ - .../gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 6 +- - drivers/gpu/drm/amd/display/dc/inc/core_types.h | 7 +- - 8 files changed, 89 insertions(+), 88 deletions(-) - -diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c -index cb76200..1922c13 100644 ---- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c -+++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c -@@ -547,9 +547,9 @@ static void split_stream_across_pipes( - *secondary_pipe = *primary_pipe; - - secondary_pipe->pipe_idx = pipe_idx; -- secondary_pipe->mi = pool->mis[secondary_pipe->pipe_idx]; -- secondary_pipe->ipp = pool->ipps[secondary_pipe->pipe_idx]; -- secondary_pipe->xfm = pool->transforms[secondary_pipe->pipe_idx]; -+ secondary_pipe->plane_res.mi = pool->mis[secondary_pipe->pipe_idx]; -+ secondary_pipe->plane_res.ipp = pool->ipps[secondary_pipe->pipe_idx]; -+ secondary_pipe->plane_res.xfm = pool->transforms[secondary_pipe->pipe_idx]; - if (primary_pipe->bottom_pipe) { - secondary_pipe->bottom_pipe = primary_pipe->bottom_pipe; - secondary_pipe->bottom_pipe->top_pipe = secondary_pipe; -diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c -index 4917dbb..77ca5dd 100644 ---- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c -+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c -@@ -845,15 +845,15 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) - pipe_ctx->plane_res.scl_data.v_active = timing->v_addressable; - - /* Taps calculations */ -- res = pipe_ctx->xfm->funcs->transform_get_optimal_number_of_taps( -- pipe_ctx->xfm, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality); -+ res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps( -+ pipe_ctx->plane_res.xfm, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality); - - if (!res) { - /* Try 24 bpp linebuffer */ - pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_24BPP; - -- res = pipe_ctx->xfm->funcs->transform_get_optimal_number_of_taps( -- pipe_ctx->xfm, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality); -+ res = pipe_ctx->plane_res.xfm->funcs->transform_get_optimal_number_of_taps( -+ pipe_ctx->plane_res.xfm, &pipe_ctx->plane_res.scl_data, &plane_state->scaling_quality); - } - - if (res) -@@ -1012,9 +1012,9 @@ static int acquire_first_split_pipe( - - memset(pipe_ctx, 0, sizeof(*pipe_ctx)); - pipe_ctx->tg = pool->timing_generators[i]; -- pipe_ctx->mi = pool->mis[i]; -- pipe_ctx->ipp = pool->ipps[i]; -- pipe_ctx->xfm = pool->transforms[i]; -+ pipe_ctx->plane_res.mi = pool->mis[i]; -+ pipe_ctx->plane_res.ipp = pool->ipps[i]; -+ pipe_ctx->plane_res.xfm = pool->transforms[i]; - pipe_ctx->opp = pool->opps[i]; - pipe_ctx->dis_clk = pool->display_clock; - pipe_ctx->pipe_idx = i; -@@ -1242,9 +1242,9 @@ static int acquire_first_free_pipe( - struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; - - pipe_ctx->tg = pool->timing_generators[i]; -- pipe_ctx->mi = pool->mis[i]; -- pipe_ctx->ipp = pool->ipps[i]; -- pipe_ctx->xfm = pool->transforms[i]; -+ pipe_ctx->plane_res.mi = pool->mis[i]; -+ pipe_ctx->plane_res.ipp = pool->ipps[i]; -+ pipe_ctx->plane_res.xfm = pool->transforms[i]; - pipe_ctx->opp = pool->opps[i]; - pipe_ctx->dis_clk = pool->display_clock; - pipe_ctx->pipe_idx = i; -diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c -index ef3a7b8..1058789 100644 ---- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c -+++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c -@@ -183,13 +183,13 @@ bool dc_stream_set_cursor_attributes( - for (i = 0; i < MAX_PIPES; i++) { - struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; - -- if (pipe_ctx->stream != stream || !pipe_ctx->ipp) -+ if (pipe_ctx->stream != stream || !pipe_ctx->plane_res.ipp) - continue; - if (pipe_ctx->top_pipe && pipe_ctx->plane_state != pipe_ctx->top_pipe->plane_state) - continue; - -- pipe_ctx->ipp->funcs->ipp_cursor_set_attributes( -- pipe_ctx->ipp, attributes); -+ pipe_ctx->plane_res.ipp->funcs->ipp_cursor_set_attributes( -+ pipe_ctx->plane_res.ipp, attributes); - } - - return true; -@@ -218,7 +218,7 @@ bool dc_stream_set_cursor_position( - - for (i = 0; i < MAX_PIPES; i++) { - struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; -- struct input_pixel_processor *ipp = pipe_ctx->ipp; -+ struct input_pixel_processor *ipp = pipe_ctx->plane_res.ipp; - struct dc_cursor_position pos_cpy = *position; - struct dc_cursor_mi_param param = { - .pixel_clk_khz = stream->timing.pix_clk_khz, -@@ -229,7 +229,7 @@ bool dc_stream_set_cursor_position( - }; - - if (pipe_ctx->stream != stream || -- !pipe_ctx->ipp || !pipe_ctx->plane_state) -+ !pipe_ctx->plane_res.ipp || !pipe_ctx->plane_state) - continue; - - if (pipe_ctx->plane_state->address.type -diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c -index dee18c9..1586dc9 100644 ---- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c -+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c -@@ -242,7 +242,7 @@ static bool dce110_set_input_transfer_func( - struct pipe_ctx *pipe_ctx, - const struct dc_plane_state *plane_state) - { -- struct input_pixel_processor *ipp = pipe_ctx->ipp; -+ struct input_pixel_processor *ipp = pipe_ctx->plane_res.ipp; - const struct dc_transfer_func *tf = NULL; - struct ipp_prescale_params prescale_params = { 0 }; - bool result = true; -@@ -625,7 +625,7 @@ static bool dce110_set_output_transfer_func( - struct pipe_ctx *pipe_ctx, - const struct dc_stream_state *stream) - { -- struct transform *xfm = pipe_ctx->xfm; -+ struct transform *xfm = pipe_ctx->plane_res.xfm; - - xfm->funcs->opp_power_on_regamma_lut(xfm, true); - xfm->regamma_params.hw_points_num = GAMMA_HW_POINTS_NUM; -@@ -951,7 +951,7 @@ static void program_scaler(const struct core_dc *dc, - - #if defined(CONFIG_DRM_AMD_DC_DCN1_0) - /* TOFPGA */ -- if (pipe_ctx->xfm->funcs->transform_set_pixel_storage_depth == NULL) -+ if (pipe_ctx->plane_res.xfm->funcs->transform_set_pixel_storage_depth == NULL) - return; - #endif - -@@ -962,8 +962,8 @@ static void program_scaler(const struct core_dc *dc, - pipe_ctx->stream->output_color_space, - &color); - -- pipe_ctx->xfm->funcs->transform_set_pixel_storage_depth( -- pipe_ctx->xfm, -+ pipe_ctx->plane_res.xfm->funcs->transform_set_pixel_storage_depth( -+ pipe_ctx->plane_res.xfm, - pipe_ctx->plane_res.scl_data.lb_params.depth, - &pipe_ctx->stream->bit_depth_params); - -@@ -972,7 +972,7 @@ static void program_scaler(const struct core_dc *dc, - pipe_ctx->tg, - &color); - -- pipe_ctx->xfm->funcs->transform_set_scaler(pipe_ctx->xfm, -+ pipe_ctx->plane_res.xfm->funcs->transform_set_scaler(pipe_ctx->plane_res.xfm, - &pipe_ctx->plane_res.scl_data); - } - -@@ -1125,10 +1125,10 @@ static enum dc_status apply_single_controller_ctx_to_hw( - - /* mst support - use total stream count */ - #if defined(CONFIG_DRM_AMD_DC_DCN1_0) -- if (pipe_ctx->mi->funcs->allocate_mem_input != NULL) -+ if (pipe_ctx->plane_res.mi->funcs->allocate_mem_input != NULL) - #endif -- pipe_ctx->mi->funcs->allocate_mem_input( -- pipe_ctx->mi, -+ pipe_ctx->plane_res.mi->funcs->allocate_mem_input( -+ pipe_ctx->plane_res.mi, - stream->timing.h_total, - stream->timing.v_total, - stream->timing.pix_clk_khz, -@@ -1260,16 +1260,16 @@ void dce110_set_displaymarks( - - total_dest_line_time_ns = compute_pstate_blackout_duration( - dc->bw_vbios.blackout_duration, pipe_ctx->stream); -- pipe_ctx->mi->funcs->mem_input_program_display_marks( -- pipe_ctx->mi, -+ pipe_ctx->plane_res.mi->funcs->mem_input_program_display_marks( -+ pipe_ctx->plane_res.mi, - context->bw.dce.nbp_state_change_wm_ns[num_pipes], - context->bw.dce.stutter_exit_wm_ns[num_pipes], - context->bw.dce.urgent_wm_ns[num_pipes], - total_dest_line_time_ns); - if (i == underlay_idx) { - num_pipes++; -- pipe_ctx->mi->funcs->mem_input_program_chroma_display_marks( -- pipe_ctx->mi, -+ pipe_ctx->plane_res.mi->funcs->mem_input_program_chroma_display_marks( -+ pipe_ctx->plane_res.mi, - context->bw.dce.nbp_state_change_wm_ns[num_pipes], - context->bw.dce.stutter_exit_wm_ns[num_pipes], - context->bw.dce.urgent_wm_ns[num_pipes], -@@ -1294,15 +1294,15 @@ static void set_safe_displaymarks( - if (res_ctx->pipe_ctx[i].stream == NULL) - continue; - -- res_ctx->pipe_ctx[i].mi->funcs->mem_input_program_display_marks( -- res_ctx->pipe_ctx[i].mi, -+ res_ctx->pipe_ctx[i].plane_res.mi->funcs->mem_input_program_display_marks( -+ res_ctx->pipe_ctx[i].plane_res.mi, - nbp_marks, - max_marks, - max_marks, - MAX_WATERMARK); - if (i == underlay_idx) -- res_ctx->pipe_ctx[i].mi->funcs->mem_input_program_chroma_display_marks( -- res_ctx->pipe_ctx[i].mi, -+ res_ctx->pipe_ctx[i].plane_res.mi->funcs->mem_input_program_chroma_display_marks( -+ res_ctx->pipe_ctx[i].plane_res.mi, - nbp_marks, - max_marks, - max_marks, -@@ -1652,8 +1652,8 @@ static void dce110_reset_hw_ctx_wrap( - BREAK_TO_DEBUGGER(); - } - pipe_ctx_old->tg->funcs->disable_crtc(pipe_ctx_old->tg); -- pipe_ctx_old->mi->funcs->free_mem_input( -- pipe_ctx_old->mi, dc->current_context->stream_count); -+ pipe_ctx_old->plane_res.mi->funcs->free_mem_input( -+ pipe_ctx_old->plane_res.mi, dc->current_context->stream_count); - resource_unreference_clock_source( - &dc->current_context->res_ctx, dc->res_pool, - &pipe_ctx_old->clock_source); -@@ -1936,8 +1936,8 @@ static void set_default_colors(struct pipe_ctx *pipe_ctx) - /* Lb color depth */ - default_adjust.lb_color_depth = pipe_ctx->plane_res.scl_data.lb_params.depth; - -- pipe_ctx->xfm->funcs->opp_set_csc_default( -- pipe_ctx->xfm, &default_adjust); -+ pipe_ctx->plane_res.xfm->funcs->opp_set_csc_default( -+ pipe_ctx->plane_res.xfm, &default_adjust); - } - - -@@ -2026,7 +2026,7 @@ static void program_gamut_remap(struct pipe_ctx *pipe_ctx) - gamut_remap_matrix.matrix[10]; - } - -- pipe_ctx->xfm->funcs->transform_set_gamut_remap(pipe_ctx->xfm, &adjust); -+ pipe_ctx->plane_res.xfm->funcs->transform_set_gamut_remap(pipe_ctx->plane_res.xfm, &adjust); - } - - /** -@@ -2037,7 +2037,7 @@ static void set_plane_config( - struct pipe_ctx *pipe_ctx, - struct resource_context *res_ctx) - { -- struct mem_input *mi = pipe_ctx->mi; -+ struct mem_input *mi = pipe_ctx->plane_res.mi; - struct dc_plane_state *plane_state = pipe_ctx->plane_state; - struct xfm_grph_csc_adjustment adjust; - struct out_csc_color_matrix tbl_entry; -@@ -2059,8 +2059,8 @@ static void set_plane_config( - tbl_entry.regval[i] = - pipe_ctx->stream->csc_color_matrix.matrix[i]; - -- pipe_ctx->xfm->funcs->opp_set_csc_adjustment -- (pipe_ctx->xfm, &tbl_entry); -+ pipe_ctx->plane_res.xfm->funcs->opp_set_csc_adjustment -+ (pipe_ctx->plane_res.xfm, &tbl_entry); - } - - if (pipe_ctx->stream->gamut_remap_matrix.enable_remap == true) { -@@ -2094,7 +2094,7 @@ static void set_plane_config( - gamut_remap_matrix.matrix[10]; - } - -- pipe_ctx->xfm->funcs->transform_set_gamut_remap(pipe_ctx->xfm, &adjust); -+ pipe_ctx->plane_res.xfm->funcs->transform_set_gamut_remap(pipe_ctx->plane_res.xfm, &adjust); - - pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0; - program_scaler(dc, pipe_ctx); -@@ -2114,7 +2114,7 @@ static void set_plane_config( - - if (dc->public.config.gpu_vm_support) - mi->funcs->mem_input_program_pte_vm( -- pipe_ctx->mi, -+ pipe_ctx->plane_res.mi, - plane_state->format, - &plane_state->tiling_info, - plane_state->rotation); -@@ -2128,8 +2128,8 @@ static void update_plane_addr(const struct core_dc *dc, - if (plane_state == NULL) - return; - -- pipe_ctx->mi->funcs->mem_input_program_surface_flip_and_addr( -- pipe_ctx->mi, -+ pipe_ctx->plane_res.mi->funcs->mem_input_program_surface_flip_and_addr( -+ pipe_ctx->plane_res.mi, - &plane_state->address, - plane_state->flip_immediate); - -@@ -2144,14 +2144,14 @@ void dce110_update_pending_status(struct pipe_ctx *pipe_ctx) - return; - - plane_state->status.is_flip_pending = -- pipe_ctx->mi->funcs->mem_input_is_flip_pending( -- pipe_ctx->mi); -+ pipe_ctx->plane_res.mi->funcs->mem_input_is_flip_pending( -+ pipe_ctx->plane_res.mi); - - if (plane_state->status.is_flip_pending && !plane_state->visible) -- pipe_ctx->mi->current_address = pipe_ctx->mi->request_address; -+ pipe_ctx->plane_res.mi->current_address = pipe_ctx->plane_res.mi->request_address; - -- plane_state->status.current_address = pipe_ctx->mi->current_address; -- if (pipe_ctx->mi->current_address.type == PLN_ADDR_TYPE_GRPH_STEREO && -+ plane_state->status.current_address = pipe_ctx->plane_res.mi->current_address; -+ if (pipe_ctx->plane_res.mi->current_address.type == PLN_ADDR_TYPE_GRPH_STEREO && - pipe_ctx->tg->funcs->is_stereo_left_eye) { - plane_state->status.is_right_eye =\ - !pipe_ctx->tg->funcs->is_stereo_left_eye(pipe_ctx->tg); -@@ -2488,7 +2488,7 @@ static void dce110_set_bandwidth( - static void dce110_program_front_end_for_pipe( - struct core_dc *dc, struct pipe_ctx *pipe_ctx) - { -- struct mem_input *mi = pipe_ctx->mi; -+ struct mem_input *mi = pipe_ctx->plane_res.mi; - struct pipe_ctx *old_pipe = NULL; - struct dc_plane_state *plane_state = pipe_ctx->plane_state; - struct xfm_grph_csc_adjustment adjust; -@@ -2515,8 +2515,8 @@ static void dce110_program_front_end_for_pipe( - tbl_entry.regval[i] = - pipe_ctx->stream->csc_color_matrix.matrix[i]; - -- pipe_ctx->xfm->funcs->opp_set_csc_adjustment -- (pipe_ctx->xfm, &tbl_entry); -+ pipe_ctx->plane_res.xfm->funcs->opp_set_csc_adjustment -+ (pipe_ctx->plane_res.xfm, &tbl_entry); - } - - if (pipe_ctx->stream->gamut_remap_matrix.enable_remap == true) { -@@ -2550,7 +2550,7 @@ static void dce110_program_front_end_for_pipe( - gamut_remap_matrix.matrix[10]; - } - -- pipe_ctx->xfm->funcs->transform_set_gamut_remap(pipe_ctx->xfm, &adjust); -+ pipe_ctx->plane_res.xfm->funcs->transform_set_gamut_remap(pipe_ctx->plane_res.xfm, &adjust); - - pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0; - -@@ -2569,7 +2569,7 @@ static void dce110_program_front_end_for_pipe( - - if (dc->public.config.gpu_vm_support) - mi->funcs->mem_input_program_pte_vm( -- pipe_ctx->mi, -+ pipe_ctx->plane_res.mi, - plane_state->format, - &plane_state->tiling_info, - plane_state->rotation); -@@ -2673,7 +2673,7 @@ static void program_csc_matrix(struct pipe_ctx *pipe_ctx, - - tbl_entry.color_space = color_space; - //tbl_entry.regval = matrix; -- pipe_ctx->xfm->funcs->opp_set_csc_adjustment(pipe_ctx->xfm, &tbl_entry); -+ pipe_ctx->plane_res.xfm->funcs->opp_set_csc_adjustment(pipe_ctx->plane_res.xfm, &tbl_entry); - } - } - -diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c -index f580da1b..04a50823 100644 ---- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c -+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c -@@ -1017,9 +1017,9 @@ static struct pipe_ctx *dce110_acquire_underlay( - return NULL; - - pipe_ctx->tg = pool->timing_generators[underlay_idx]; -- pipe_ctx->mi = pool->mis[underlay_idx]; -- /*pipe_ctx->ipp = res_ctx->pool->ipps[underlay_idx];*/ -- pipe_ctx->xfm = pool->transforms[underlay_idx]; -+ pipe_ctx->plane_res.mi = pool->mis[underlay_idx]; -+ /*pipe_ctx->plane_res.ipp = res_ctx->pool->ipps[underlay_idx];*/ -+ pipe_ctx->plane_res.xfm = pool->transforms[underlay_idx]; - pipe_ctx->opp = pool->opps[underlay_idx]; - pipe_ctx->dis_clk = pool->display_clock; - pipe_ctx->pipe_idx = underlay_idx; -@@ -1049,7 +1049,7 @@ static struct pipe_ctx *dce110_acquire_underlay( - true, - &stream->timing); - -- pipe_ctx->mi->funcs->allocate_mem_input(pipe_ctx->mi, -+ pipe_ctx->plane_res.mi->funcs->allocate_mem_input(pipe_ctx->plane_res.mi, - stream->timing.h_total, - stream->timing.v_total, - stream->timing.pix_clk_khz, -diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c -index 314d764..1cf672d 100644 ---- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c -+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c -@@ -1070,8 +1070,8 @@ static void update_plane_addr(const struct core_dc *dc, struct pipe_ctx *pipe_ct - if (plane_state == NULL) - return; - addr_patched = patch_address_for_sbs_tb_stereo(pipe_ctx, &addr); -- pipe_ctx->mi->funcs->mem_input_program_surface_flip_and_addr( -- pipe_ctx->mi, -+ pipe_ctx->plane_res.mi->funcs->mem_input_program_surface_flip_and_addr( -+ pipe_ctx->plane_res.mi, - &plane_state->address, - plane_state->flip_immediate); - plane_state->status.requested_address = plane_state->address; -@@ -1082,7 +1082,7 @@ static void update_plane_addr(const struct core_dc *dc, struct pipe_ctx *pipe_ct - static bool dcn10_set_input_transfer_func( - struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state) - { -- struct input_pixel_processor *ipp = pipe_ctx->ipp; -+ struct input_pixel_processor *ipp = pipe_ctx->plane_res.ipp; - const struct dc_transfer_func *tf = NULL; - bool result = true; - -@@ -1447,7 +1447,7 @@ static bool dcn10_set_output_transfer_func( - struct pipe_ctx *pipe_ctx, - const struct dc_stream_state *stream) - { -- struct transform *xfm = pipe_ctx->xfm; -+ struct transform *xfm = pipe_ctx->plane_res.xfm; - - if (xfm == NULL) - return false; -@@ -1778,7 +1778,7 @@ static void program_gamut_remap(struct pipe_ctx *pipe_ctx) - gamut_remap_matrix.matrix[10]; - } - -- pipe_ctx->xfm->funcs->transform_set_gamut_remap(pipe_ctx->xfm, &adjust); -+ pipe_ctx->plane_res.xfm->funcs->transform_set_gamut_remap(pipe_ctx->plane_res.xfm, &adjust); - } - - -@@ -1800,7 +1800,7 @@ static void program_csc_matrix(struct pipe_ctx *pipe_ctx, - - tbl_entry.color_space = color_space; - //tbl_entry.regval = matrix; -- pipe_ctx->xfm->funcs->opp_set_csc_adjustment(pipe_ctx->xfm, &tbl_entry); -+ pipe_ctx->plane_res.xfm->funcs->opp_set_csc_adjustment(pipe_ctx->plane_res.xfm, &tbl_entry); - } - } - static bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx) -@@ -1896,8 +1896,8 @@ static void update_dchubp_dpp( - struct validate_context *context) - { - struct dce_hwseq *hws = dc->hwseq; -- struct mem_input *mi = pipe_ctx->mi; -- struct input_pixel_processor *ipp = pipe_ctx->ipp; -+ struct mem_input *mi = pipe_ctx->plane_res.mi; -+ struct input_pixel_processor *ipp = pipe_ctx->plane_res.ipp; - struct dc_plane_state *plane_state = pipe_ctx->plane_state; - union plane_size size = plane_state->plane_size; - struct default_adjustment ocsc = {0}; -@@ -1935,7 +1935,7 @@ static void update_dchubp_dpp( - - if (dc->public.config.gpu_vm_support) - mi->funcs->mem_input_program_pte_vm( -- pipe_ctx->mi, -+ pipe_ctx->plane_res.mi, - plane_state->format, - &plane_state->tiling_info, - plane_state->rotation); -@@ -1968,8 +1968,8 @@ static void update_dchubp_dpp( - pipe_ctx->plane_res.scl_data.lb_params.alpha_en = per_pixel_alpha; - pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP; - /* scaler configuration */ -- pipe_ctx->xfm->funcs->transform_set_scaler( -- pipe_ctx->xfm, &pipe_ctx->plane_res.scl_data); -+ pipe_ctx->plane_res.xfm->funcs->transform_set_scaler( -+ pipe_ctx->plane_res.xfm, &pipe_ctx->plane_res.scl_data); - mi->funcs->mem_program_viewport(mi, - &pipe_ctx->plane_res.scl_data.viewport, &pipe_ctx->plane_res.scl_data.viewport_c); - -@@ -1978,7 +1978,7 @@ static void update_dchubp_dpp( - - /*TODO add adjustments parameters*/ - ocsc.out_color_space = pipe_ctx->stream->output_color_space; -- pipe_ctx->xfm->funcs->opp_set_csc_default(pipe_ctx->xfm, &ocsc); -+ pipe_ctx->plane_res.xfm->funcs->opp_set_csc_default(pipe_ctx->plane_res.xfm, &ocsc); - - mi->funcs->mem_input_program_surface_config( - mi, -@@ -2098,7 +2098,7 @@ static void dcn10_apply_ctx_for_surface( - */ - - if (pipe_ctx->plane_state && !old_pipe_ctx->plane_state) { -- if (pipe_ctx->mi->opp_id != 0xf && pipe_ctx->tg->inst == be_idx) { -+ if (pipe_ctx->plane_res.mi->opp_id != 0xf && pipe_ctx->tg->inst == be_idx) { - dcn10_power_down_fe(dc, pipe_ctx->pipe_idx); - /* - * power down fe will unlock when calling reset, need -@@ -2124,7 +2124,7 @@ static void dcn10_apply_ctx_for_surface( - dc->res_pool->mpc, - old_pipe_ctx->opp, - old_pipe_ctx->pipe_idx); -- old_pipe_ctx->opp->mpcc_disconnect_pending[old_pipe_ctx->mi->mpcc_id] = true; -+ old_pipe_ctx->opp->mpcc_disconnect_pending[old_pipe_ctx->plane_res.mi->mpcc_id] = true; - - /*dm_logger_write(dc->ctx->logger, LOG_ERROR, - "[debug_mpo: apply_ctx disconnect pending on mpcc %d]\n", -@@ -2481,19 +2481,19 @@ void dcn10_update_pending_status(struct pipe_ctx *pipe_ctx) - return; - - plane_state->status.is_flip_pending = -- pipe_ctx->mi->funcs->mem_input_is_flip_pending( -- pipe_ctx->mi); -+ pipe_ctx->plane_res.mi->funcs->mem_input_is_flip_pending( -+ pipe_ctx->plane_res.mi); - - /* DCN we read INUSE address in MI, do we still need this wa? */ - if (plane_state->status.is_flip_pending && - !plane_state->visible) { -- pipe_ctx->mi->current_address = -- pipe_ctx->mi->request_address; -+ pipe_ctx->plane_res.mi->current_address = -+ pipe_ctx->plane_res.mi->request_address; - BREAK_TO_DEBUGGER(); - } - -- plane_state->status.current_address = pipe_ctx->mi->current_address; -- if (pipe_ctx->mi->current_address.type == PLN_ADDR_TYPE_GRPH_STEREO && -+ plane_state->status.current_address = pipe_ctx->plane_res.mi->current_address; -+ if (pipe_ctx->plane_res.mi->current_address.type == PLN_ADDR_TYPE_GRPH_STEREO && - tg->funcs->is_stereo_left_eye) { - plane_state->status.is_right_eye = - !tg->funcs->is_stereo_left_eye(pipe_ctx->tg); -diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c -index 3fe6df9..710e514 100644 ---- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c -+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c -@@ -963,9 +963,9 @@ static struct pipe_ctx *dcn10_acquire_idle_pipe_for_layer( - idle_pipe->tg = head_pipe->tg; - idle_pipe->opp = head_pipe->opp; - -- idle_pipe->mi = pool->mis[idle_pipe->pipe_idx]; -- idle_pipe->ipp = pool->ipps[idle_pipe->pipe_idx]; -- idle_pipe->xfm = pool->transforms[idle_pipe->pipe_idx]; -+ idle_pipe->plane_res.mi = pool->mis[idle_pipe->pipe_idx]; -+ idle_pipe->plane_res.ipp = pool->ipps[idle_pipe->pipe_idx]; -+ idle_pipe->plane_res.xfm = pool->transforms[idle_pipe->pipe_idx]; - - return idle_pipe; - } -diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h -index dbca1de..4640c43 100644 ---- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h -+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h -@@ -158,6 +158,10 @@ struct stream_resource { - - struct plane_resource { - struct scaler_data scl_data; -+ -+ struct mem_input *mi; -+ struct input_pixel_processor *ipp; -+ struct transform *xfm; - }; - - struct pipe_ctx { -@@ -167,9 +171,6 @@ struct pipe_ctx { - struct plane_resource plane_res; - struct stream_resource stream_res; - -- struct mem_input *mi; -- struct input_pixel_processor *ipp; -- struct transform *xfm; - struct output_pixel_processor *opp; - struct timing_generator *tg; - --- -2.7.4 - |