diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0540-drm-amd-display-Workaround-IGT-multiplane-restrictio.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0540-drm-amd-display-Workaround-IGT-multiplane-restrictio.patch | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0540-drm-amd-display-Workaround-IGT-multiplane-restrictio.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0540-drm-amd-display-Workaround-IGT-multiplane-restrictio.patch new file mode 100644 index 00000000..37b57138 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0540-drm-amd-display-Workaround-IGT-multiplane-restrictio.patch @@ -0,0 +1,52 @@ +From 2f52e4d4c361ad24edec4660ddda2d738d327030 Mon Sep 17 00:00:00 2001 +From: "Leo (Sunpeng) Li" <sunpeng.li@amd.com> +Date: Fri, 16 Jun 2017 15:59:17 -0400 +Subject: [PATCH 0540/4131] drm/amd/display: Workaround IGT multiplane + restriction + +IGT currently does not properly commit changes on planes with multiple +possible CRTC's. Set one valid CRTC for each plane for now, plus one +underlay plane on Carizzo and Stoney that is valid for all CRTCs. + +Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> +Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 +++++++++++++- + 1 file changed, 13 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +index 3bdf683..605da36 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -1189,6 +1189,7 @@ int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) + struct amdgpu_encoder *aencoder = NULL; + struct amdgpu_mode_info *mode_info = &adev->mode_info; + uint32_t link_cnt; ++ unsigned long possible_crtcs; + + link_cnt = dm->dc->caps.max_links; + if (amdgpu_dm_mode_config_init(dm->adev)) { +@@ -1204,7 +1205,18 @@ int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) + goto fail_free_planes; + } + mode_info->planes[i]->base.type = mode_info->plane_type[i]; +- if (amdgpu_dm_plane_init(dm, mode_info->planes[i], 0xff)) { ++ ++ /* ++ * HACK: IGT tests expect that each plane can only have one ++ * one possible CRTC. For now, set one CRTC for each ++ * plane that is not an underlay, but still allow multiple ++ * CRTCs for underlay planes. ++ */ ++ possible_crtcs = 1 << i; ++ if (i >= dm->dc->caps.max_streams) ++ possible_crtcs = 0xff; ++ ++ if (amdgpu_dm_plane_init(dm, mode_info->planes[i], possible_crtcs)) { + DRM_ERROR("KMS: Failed to initialize plane\n"); + goto fail_free_planes; + } +-- +2.7.4 + |