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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0254-drm-amd-display-remove-independent-lock-as-we-have-n.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0254-drm-amd-display-remove-independent-lock-as-we-have-n.patch138
1 files changed, 0 insertions, 138 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0254-drm-amd-display-remove-independent-lock-as-we-have-n.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0254-drm-amd-display-remove-independent-lock-as-we-have-n.patch
deleted file mode 100644
index cfbd2218..00000000
--- a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.14.71/0254-drm-amd-display-remove-independent-lock-as-we-have-n.patch
+++ /dev/null
@@ -1,138 +0,0 @@
-From e0fa19025c962f5fcb9d8c1bf51a66cd171ec6b7 Mon Sep 17 00:00:00 2001
-From: Tony Cheng <tony.cheng@amd.com>
-Date: Tue, 28 Feb 2017 22:52:29 -0500
-Subject: [PATCH 0254/4131] drm/amd/display: remove independent lock as we have
- no use case today
-
-Signed-off-by: Tony Cheng <tony.cheng@amd.com>
-Acked-by: Harry Wentland <Harry.Wentland@amd.com>
-Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
----
- drivers/gpu/drm/amd/display/dc/core/dc.c | 8 --------
- drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c | 19 +++++--------------
- drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h | 1 -
- drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h | 8 --------
- 4 files changed, 5 insertions(+), 31 deletions(-)
-
-diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
-index 8f871924..c34232c 100644
---- a/drivers/gpu/drm/amd/display/dc/core/dc.c
-+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
-@@ -1178,7 +1178,6 @@ void dc_update_surfaces_for_stream(struct dc *dc,
-
- enum surface_update_type update_type;
- const struct dc_stream_status *stream_status;
-- unsigned int lock_mask = 0;
-
- stream_status = dc_stream_get_status(dc_stream);
- ASSERT(stream_status);
-@@ -1332,15 +1331,9 @@ void dc_update_surfaces_for_stream(struct dc *dc,
- }
-
- if (!pipe_ctx->tg->funcs->is_blanked(pipe_ctx->tg)) {
-- lock_mask = PIPE_LOCK_CONTROL_GRAPHICS |
-- PIPE_LOCK_CONTROL_SCL |
-- PIPE_LOCK_CONTROL_BLENDER |
-- PIPE_LOCK_CONTROL_MODE;
--
- core_dc->hwss.pipe_control_lock(
- core_dc,
- pipe_ctx,
-- lock_mask,
- true);
- }
-
-@@ -1382,7 +1375,6 @@ void dc_update_surfaces_for_stream(struct dc *dc,
- core_dc->hwss.pipe_control_lock(
- core_dc,
- pipe_ctx,
-- lock_mask,
- false);
- }
- break;
-diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c
-index 89a8274..17cdd70 100644
---- a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c
-+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c
-@@ -46,7 +46,6 @@ void dce_enable_fe_clock(struct dce_hwseq *hws,
-
- void dce_pipe_control_lock(struct core_dc *dc,
- struct pipe_ctx *pipe,
-- enum pipe_lock_control control_mask,
- bool lock)
- {
- uint32_t lock_val = lock ? 1 : 0;
-@@ -59,18 +58,10 @@ void dce_pipe_control_lock(struct core_dc *dc,
- BLND_BLND_V_UPDATE_LOCK, &blnd,
- BLND_V_UPDATE_LOCK_MODE, &update_lock_mode);
-
-- if (control_mask & PIPE_LOCK_CONTROL_GRAPHICS)
-- dcp_grph = lock_val;
--
-- if (control_mask & PIPE_LOCK_CONTROL_SCL)
-- scl = lock_val;
--
-- if (control_mask & PIPE_LOCK_CONTROL_BLENDER)
-- blnd = lock_val;
--
-- if (control_mask & PIPE_LOCK_CONTROL_MODE)
-- update_lock_mode = lock_val;
--
-+ dcp_grph = lock_val;
-+ scl = lock_val;
-+ blnd = lock_val;
-+ update_lock_mode = lock_val;
-
- REG_SET_2(BLND_V_UPDATE_LOCK[pipe->pipe_idx], val,
- BLND_DCP_GRPH_V_UPDATE_LOCK, dcp_grph,
-@@ -82,7 +73,7 @@ void dce_pipe_control_lock(struct core_dc *dc,
- BLND_V_UPDATE_LOCK_MODE, update_lock_mode);
-
- if (hws->wa.blnd_crtc_trigger) {
-- if (!lock && (control_mask & PIPE_LOCK_CONTROL_BLENDER)) {
-+ if (!lock) {
- uint32_t value = REG_READ(CRTC_H_BLANK_START_END[pipe->pipe_idx]);
- REG_WRITE(CRTC_H_BLANK_START_END[pipe->pipe_idx], value);
- }
-diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h
-index 9ef6184..70e0652 100644
---- a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h
-+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h
-@@ -224,7 +224,6 @@ void dce_enable_fe_clock(struct dce_hwseq *hwss,
-
- void dce_pipe_control_lock(struct core_dc *dc,
- struct pipe_ctx *pipe,
-- enum pipe_lock_control control_mask,
- bool lock);
-
- void dce_set_blender_mode(struct dce_hwseq *hws,
-diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
-index 612910e..98a04cd 100644
---- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
-+++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
-@@ -34,13 +34,6 @@ enum pipe_gating_control {
- PIPE_GATING_CONTROL_INIT
- };
-
--enum pipe_lock_control {
-- PIPE_LOCK_CONTROL_GRAPHICS = 1 << 0,
-- PIPE_LOCK_CONTROL_BLENDER = 1 << 1,
-- PIPE_LOCK_CONTROL_SCL = 1 << 2,
-- PIPE_LOCK_CONTROL_MODE = 1 << 3,
--};
--
- struct dce_hwseq_wa {
- bool blnd_crtc_trigger;
- };
-@@ -128,7 +121,6 @@ struct hw_sequencer_funcs {
- void (*pipe_control_lock)(
- struct core_dc *dc,
- struct pipe_ctx *pipe,
-- enum pipe_lock_control control_mask,
- bool lock);
-
- void (*set_displaymarks)(
---
-2.7.4
-