diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/1385-drm-amd-powerplay-use-virtual-msg-index-to-replace-a.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/1385-drm-amd-powerplay-use-virtual-msg-index-to-replace-a.patch | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/1385-drm-amd-powerplay-use-virtual-msg-index-to-replace-a.patch b/meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/1385-drm-amd-powerplay-use-virtual-msg-index-to-replace-a.patch new file mode 100644 index 00000000..1dfb405f --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/1385-drm-amd-powerplay-use-virtual-msg-index-to-replace-a.patch @@ -0,0 +1,65 @@ +From 8ba6d47c7e769458d1a3ccb654f23073aaa57cf4 Mon Sep 17 00:00:00 2001 +From: Kevin Wang <Kevin1.Wang@amd.com> +Date: Wed, 19 Dec 2018 16:23:23 +0800 +Subject: [PATCH 1385/2940] drm/amd/powerplay: use virtual msg index to replace + asic-related msg index + +Using virtual msg index is able to support all ASIC specific message values on +one smu upper layer. + +Signed-off-by: Kevin Wang <Kevin1.Wang@amd.com> +Reviewed-by: Huang Rui <ray.huang@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 16 ++++++++++++---- + 1 file changed, 12 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +index c0ff55f31954..ff1120af04a3 100644 +--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c ++++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +@@ -81,13 +81,17 @@ static int smu_v11_0_wait_for_response(struct smu_context *smu) + static int smu_v11_0_send_msg(struct smu_context *smu, uint16_t msg) + { + struct amdgpu_device *adev = smu->adev; +- int ret = 0; ++ int ret = 0, index = 0; ++ ++ index = smu_msg_get_index(smu, msg); ++ if (index < 0) ++ return index; + + smu_v11_0_wait_for_response(smu); + + WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); + +- smu_v11_0_send_msg_without_waiting(smu, msg); ++ smu_v11_0_send_msg_without_waiting(smu, (uint16_t)index); + + ret = smu_v11_0_wait_for_response(smu); + +@@ -105,7 +109,11 @@ smu_v11_0_send_msg_with_param(struct smu_context *smu, uint16_t msg, + { + + struct amdgpu_device *adev = smu->adev; +- int ret = 0; ++ int ret = 0, index = 0; ++ ++ index = smu_msg_get_index(smu, msg); ++ if (index < 0) ++ return index; + + ret = smu_v11_0_wait_for_response(smu); + if (ret) +@@ -116,7 +124,7 @@ smu_v11_0_send_msg_with_param(struct smu_context *smu, uint16_t msg, + + WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, param); + +- smu_v11_0_send_msg_without_waiting(smu, msg); ++ smu_v11_0_send_msg_without_waiting(smu, (uint16_t)index); + + ret = smu_v11_0_wait_for_response(smu); + if (ret) +-- +2.17.1 + |