diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0902-drm-amd-powerplay-improve-OD-code-robustness.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0902-drm-amd-powerplay-improve-OD-code-robustness.patch | 78 |
1 files changed, 78 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0902-drm-amd-powerplay-improve-OD-code-robustness.patch b/meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0902-drm-amd-powerplay-improve-OD-code-robustness.patch new file mode 100644 index 00000000..b840c2b8 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0902-drm-amd-powerplay-improve-OD-code-robustness.patch @@ -0,0 +1,78 @@ +From e414a726135313b1544df6b23368ad4c814b045f Mon Sep 17 00:00:00 2001 +From: tianci yin <tianci.yin@amd.com> +Date: Tue, 4 Dec 2018 16:07:18 +0800 +Subject: [PATCH 0902/2940] drm/amd/powerplay: improve OD code robustness + +add protection code to avoid lower frequency trigger over drive. + +Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> +Signed-off-by: Tianci Yin <tianci.yin@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 12 ++++++++---- + drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 12 ++++++++---- + 2 files changed, 16 insertions(+), 8 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +index 1f12fc7ea7c9..8e44ad3a1d92 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +@@ -3592,8 +3592,10 @@ static int smu7_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, cons + } + + if (i >= sclk_table->count) { +- data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK; +- sclk_table->dpm_levels[i-1].value = sclk; ++ if (sclk > sclk_table->dpm_levels[i-1].value) { ++ data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK; ++ sclk_table->dpm_levels[i-1].value = sclk; ++ } + } else { + /* TODO: Check SCLK in DAL's minimum clocks + * in case DeepSleep divider update is required. +@@ -3610,8 +3612,10 @@ static int smu7_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, cons + } + + if (i >= mclk_table->count) { +- data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_MCLK; +- mclk_table->dpm_levels[i-1].value = mclk; ++ if (mclk > mclk_table->dpm_levels[i-1].value) { ++ data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_MCLK; ++ mclk_table->dpm_levels[i-1].value = mclk; ++ } + } + + if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +index e2bc6e0c229f..79c86247d0ac 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +@@ -3266,8 +3266,10 @@ static int vega10_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, co + } + + if (i >= sclk_table->count) { +- data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_SCLK; +- sclk_table->dpm_levels[i-1].value = sclk; ++ if (sclk > sclk_table->dpm_levels[i-1].value) { ++ data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_SCLK; ++ sclk_table->dpm_levels[i-1].value = sclk; ++ } + } + + for (i = 0; i < mclk_table->count; i++) { +@@ -3276,8 +3278,10 @@ static int vega10_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, co + } + + if (i >= mclk_table->count) { +- data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_MCLK; +- mclk_table->dpm_levels[i-1].value = mclk; ++ if (mclk > mclk_table->dpm_levels[i-1].value) { ++ data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_MCLK; ++ mclk_table->dpm_levels[i-1].value = mclk; ++ } + } + + if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) +-- +2.17.1 + |