diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0571-drm-amdgpu-both-support-PCO-FP5-AM4-rlc-fw.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0571-drm-amdgpu-both-support-PCO-FP5-AM4-rlc-fw.patch | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0571-drm-amdgpu-both-support-PCO-FP5-AM4-rlc-fw.patch b/meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0571-drm-amdgpu-both-support-PCO-FP5-AM4-rlc-fw.patch new file mode 100644 index 00000000..9a30f030 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0571-drm-amdgpu-both-support-PCO-FP5-AM4-rlc-fw.patch @@ -0,0 +1,58 @@ +From c18790f5f0c4379e0a8a0af70fa19529d63aa2dc Mon Sep 17 00:00:00 2001 +From: Aaron Liu <aaron.liu@amd.com> +Date: Wed, 5 Dec 2018 11:07:55 +0800 +Subject: [PATCH 0571/2940] drm/amdgpu: both support PCO FP5/AM4 rlc fw + +For Picasso && AM4 SOCKET board, we use picasso_rlc_am4.bin +For Picasso && FP5 SOCKET board, we use picasso_rlc.bin + +Judgment method: +PCO AM4: revision >= 0xC8 && revision <= 0xCF + or revision >= 0xD8 && revision <= 0xDF +otherwise is PCO FP5 + +Change-Id: I359f0a3d1bc7d4d49c871cb3fb82797c7b91b259 +Signed-off-by: Aaron Liu <aaron.liu@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher at amd.com> +Reviewed-by: Huang Rui <ray.huang at amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 16 +++++++++++++++- + 1 file changed, 15 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +index 2dee157f62bf..3e2b045e9fa7 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -86,6 +86,7 @@ MODULE_FIRMWARE("amdgpu/picasso_me.bin"); + MODULE_FIRMWARE("amdgpu/picasso_mec.bin"); + MODULE_FIRMWARE("amdgpu/picasso_mec2.bin"); + MODULE_FIRMWARE("amdgpu/picasso_rlc.bin"); ++MODULE_FIRMWARE("amdgpu/picasso_rlc_am4.bin"); + + MODULE_FIRMWARE("amdgpu/raven2_ce.bin"); + MODULE_FIRMWARE("amdgpu/raven2_pfp.bin"); +@@ -660,7 +661,20 @@ static int gfx_v9_0_init_microcode(struct amdgpu_device *adev) + adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); + adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); + +- snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name); ++ /* ++ * For Picasso && AM4 SOCKET board, we use picasso_rlc_am4.bin ++ * instead of picasso_rlc.bin. ++ * Judgment method: ++ * PCO AM4: revision >= 0xC8 && revision <= 0xCF ++ * or revision >= 0xD8 && revision <= 0xDF ++ * otherwise is PCO FP5 ++ */ ++ if (!strcmp(chip_name, "picasso") && ++ (((adev->pdev->revision >= 0xC8) && (adev->pdev->revision <= 0xCF)) || ++ ((adev->pdev->revision >= 0xD8) && (adev->pdev->revision <= 0xDF)))) ++ snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc_am4.bin", chip_name); ++ else ++ snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name); + err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev); + if (err) + goto out; +-- +2.17.1 + |