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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0339-drm-amd-display-RV2-DP-MST-2nd-display-within-daisy-.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0339-drm-amd-display-RV2-DP-MST-2nd-display-within-daisy-.patch57
1 files changed, 57 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0339-drm-amd-display-RV2-DP-MST-2nd-display-within-daisy-.patch b/meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0339-drm-amd-display-RV2-DP-MST-2nd-display-within-daisy-.patch
new file mode 100644
index 00000000..bd75c03b
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux-4.19/linux-yocto-4.19.8/0339-drm-amd-display-RV2-DP-MST-2nd-display-within-daisy-.patch
@@ -0,0 +1,57 @@
+From d1cabfed385822f90d76a0624f0dde63e555a7f5 Mon Sep 17 00:00:00 2001
+From: Hersen Wu <hersenxs.wu@amd.com>
+Date: Tue, 9 Oct 2018 13:50:10 -0400
+Subject: [PATCH 0339/2940] drm/amd/display: RV2 DP MST 2nd display within
+ daisy chain not light up
+
+RV2 resource is limit to 3 pipes. Limitation should apply to all HW
+blocks instead of front pipe.
+
+Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+Reviewed-by: Huang Rui <ray.huang@amd.com>
+Signed-off-by: Huang Rui <ray.huang@amd.com>
+---
+ .../drm/amd/display/dc/dcn10/dcn10_resource.c | 19 ++++++++++++++++++-
+ 1 file changed, 18 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+index cb1b134b8fcb..e148f708e8b3 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+@@ -507,6 +507,18 @@ static const struct resource_caps res_cap = {
+ .num_ddc = 4,
+ };
+
++#if defined(CONFIG_DRM_AMD_DC_DCN1_01)
++static const struct resource_caps rv2_res_cap = {
++ .num_timing_generator = 3,
++ .num_opp = 3,
++ .num_video_plane = 3,
++ .num_audio = 3,
++ .num_stream_encoder = 3,
++ .num_pll = 3,
++ .num_ddc = 3,
++};
++#endif
++
+ static const struct dc_debug_options debug_defaults_drv = {
+ .sanity_checks = true,
+ .disable_dmcu = true,
+@@ -1152,7 +1164,12 @@ static bool construct(
+
+ ctx->dc_bios->regs = &bios_regs;
+
+- pool->base.res_cap = &res_cap;
++#if defined(CONFIG_DRM_AMD_DC_DCN1_01)
++ if (ctx->dce_version == DCN_VERSION_1_01)
++ pool->base.res_cap = &rv2_res_cap;
++ else
++#endif
++ pool->base.res_cap = &res_cap;
+ pool->base.funcs = &dcn10_res_pool_funcs;
+
+ /*
+--
+2.17.1
+