diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/5411-drm-amdgpu-use-leaf-iterator-for-filling-PTs.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/5411-drm-amdgpu-use-leaf-iterator-for-filling-PTs.patch | 115 |
1 files changed, 115 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/5411-drm-amdgpu-use-leaf-iterator-for-filling-PTs.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/5411-drm-amdgpu-use-leaf-iterator-for-filling-PTs.patch new file mode 100644 index 00000000..da1c7f48 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/5411-drm-amdgpu-use-leaf-iterator-for-filling-PTs.patch @@ -0,0 +1,115 @@ +From 55feb264cf39b73086e927d581f3e5fc442c877a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Mon, 3 Sep 2018 14:34:51 +0200 +Subject: [PATCH 5411/5725] drm/amdgpu: use leaf iterator for filling PTs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Less overhead and is the starting point for further cleanups and +improvements. + +Signed-off-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> +Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> +Reviewed-by: Huang Rui <ray.huang@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 62 ++++++++-------------------------- + 1 file changed, 15 insertions(+), 47 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +index 4cffd7e..1a3d19f 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +@@ -1417,36 +1417,6 @@ int amdgpu_vm_update_directories(struct amdgpu_device *adev, + } + + /** +- * amdgpu_vm_find_entry - find the entry for an address +- * +- * @p: see amdgpu_pte_update_params definition +- * @addr: virtual address in question +- * @entry: resulting entry or NULL +- * @parent: parent entry +- * +- * Find the vm_pt entry and it's parent for the given address. +- */ +-void amdgpu_vm_get_entry(struct amdgpu_pte_update_params *p, uint64_t addr, +- struct amdgpu_vm_pt **entry, +- struct amdgpu_vm_pt **parent) +-{ +- unsigned level = p->adev->vm_manager.root_level; +- +- *parent = NULL; +- *entry = &p->vm->root; +- while ((*entry)->entries) { +- unsigned shift = amdgpu_vm_level_shift(p->adev, level++); +- +- *parent = *entry; +- *entry = &(*entry)->entries[addr >> shift]; +- addr &= (1ULL << shift) - 1; +- } +- +- if (level != AMDGPU_VM_PTB) +- *entry = NULL; +-} +- +-/** + * amdgpu_vm_handle_huge_pages - handle updating the PD with huge pages + * + * @p: see amdgpu_pte_update_params definition +@@ -1509,36 +1479,34 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params, + { + struct amdgpu_device *adev = params->adev; + const uint64_t mask = AMDGPU_VM_PTE_COUNT(adev) - 1; +- +- uint64_t addr, pe_start; +- struct amdgpu_bo *pt; +- unsigned nptes; ++ struct amdgpu_vm_pt_cursor cursor; + + /* walk over the address space and update the page tables */ +- for (addr = start; addr < end; addr += nptes, +- dst += nptes * AMDGPU_GPU_PAGE_SIZE) { +- struct amdgpu_vm_pt *entry, *parent; ++ for_each_amdgpu_vm_pt_leaf(adev, params->vm, start, end - 1, cursor) { ++ struct amdgpu_bo *pt = cursor.entry->base.bo; ++ uint64_t pe_start; ++ unsigned nptes; + +- amdgpu_vm_get_entry(params, addr, &entry, &parent); +- if (!entry) ++ if (!pt || cursor.level != AMDGPU_VM_PTB) + return -ENOENT; + +- if ((addr & ~mask) == (end & ~mask)) +- nptes = end - addr; ++ if ((cursor.pfn & ~mask) == (end & ~mask)) ++ nptes = end - cursor.pfn; + else +- nptes = AMDGPU_VM_PTE_COUNT(adev) - (addr & mask); ++ nptes = AMDGPU_VM_PTE_COUNT(adev) - (cursor.pfn & mask); + +- amdgpu_vm_handle_huge_pages(params, entry, parent, ++ amdgpu_vm_handle_huge_pages(params, cursor.entry, cursor.parent, + nptes, dst, flags); + /* We don't need to update PTEs for huge pages */ +- if (entry->huge) ++ if (cursor.entry->huge) { ++ dst += nptes * AMDGPU_GPU_PAGE_SIZE; + continue; ++ } + +- pt = entry->base.bo; +- pe_start = (addr & mask) * 8; ++ pe_start = (cursor.pfn & mask) * 8; + amdgpu_vm_update_func(params, pt, pe_start, dst, nptes, + AMDGPU_GPU_PAGE_SIZE, flags); +- ++ dst += nptes * AMDGPU_GPU_PAGE_SIZE; + } + + return 0; +-- +2.7.4 + |