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Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4983-drm-amd-display-Convert-10kHz-clks-from-PPLib-into-k.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.14.71/4983-drm-amd-display-Convert-10kHz-clks-from-PPLib-into-k.patch36
1 files changed, 36 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4983-drm-amd-display-Convert-10kHz-clks-from-PPLib-into-k.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4983-drm-amd-display-Convert-10kHz-clks-from-PPLib-into-k.patch
new file mode 100644
index 00000000..a7007c06
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4983-drm-amd-display-Convert-10kHz-clks-from-PPLib-into-k.patch
@@ -0,0 +1,36 @@
+From 705cff090240cdf66e5c14afa9b17c926f7dcbda Mon Sep 17 00:00:00 2001
+From: Rex Zhu <rex.zhu@amd.com>
+Date: Tue, 17 Jul 2018 20:18:04 +0800
+Subject: [PATCH 4983/5725] drm/amd/display: Convert 10kHz clks from PPLib into
+ kHz
+
+Except special naming as *_in_khz, The default clock unit in powerplay
+is in 10KHz. so need to * 10 as expecting clock frequency in display
+is in kHz.
+
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Reviewed-by: Harry Wentland <harry.wentland@amd.com>
+Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
+index c69ae78..fbe878a 100644
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
+@@ -469,8 +469,8 @@ bool dm_pp_get_static_clocks(
+ return false;
+
+ static_clk_info->max_clocks_state = pp_to_dc_powerlevel_state(pp_clk_info.max_clocks_state);
+- static_clk_info->max_mclk_khz = pp_clk_info.max_memory_clock;
+- static_clk_info->max_sclk_khz = pp_clk_info.max_engine_clock;
++ static_clk_info->max_mclk_khz = pp_clk_info.max_memory_clock * 10;
++ static_clk_info->max_sclk_khz = pp_clk_info.max_engine_clock * 10;
+
+ return true;
+ }
+--
+2.7.4
+