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Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4656-drm-amd-pp-Fix-wrong-clock-unit-exported-to-Display.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.14.71/4656-drm-amd-pp-Fix-wrong-clock-unit-exported-to-Display.patch141
1 files changed, 141 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4656-drm-amd-pp-Fix-wrong-clock-unit-exported-to-Display.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4656-drm-amd-pp-Fix-wrong-clock-unit-exported-to-Display.patch
new file mode 100644
index 00000000..75d4cac1
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4656-drm-amd-pp-Fix-wrong-clock-unit-exported-to-Display.patch
@@ -0,0 +1,141 @@
+From f4ac39cc0ed4c86d1c99723fcebbd60c707a1109 Mon Sep 17 00:00:00 2001
+From: Rex Zhu <Rex.Zhu@amd.com>
+Date: Mon, 18 Jun 2018 18:15:15 +0800
+Subject: [PATCH 4656/5725] drm/amd/pp: Fix wrong clock-unit exported to
+ Display
+
+Transfer 10KHz (requested by smu) to KHz needed by Display
+component.
+
+This can fix the issue 4k Monitor can't be lit up on Vega/Raven.
+
+Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
+---
+ drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 4 ++--
+ drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 10 +++++-----
+ drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 10 +++++-----
+ 3 files changed, 12 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
+index d4bc83e..c905df4 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
+@@ -993,7 +993,7 @@ static int smu10_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr,
+
+ clocks->num_levels = 0;
+ for (i = 0; i < pclk_vol_table->count; i++) {
+- clocks->data[i].clocks_in_khz = pclk_vol_table->entries[i].clk;
++ clocks->data[i].clocks_in_khz = pclk_vol_table->entries[i].clk * 10;
+ clocks->data[i].latency_in_us = latency_required ?
+ smu10_get_mem_latency(hwmgr,
+ pclk_vol_table->entries[i].clk) :
+@@ -1044,7 +1044,7 @@ static int smu10_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr,
+
+ clocks->num_levels = 0;
+ for (i = 0; i < pclk_vol_table->count; i++) {
+- clocks->data[i].clocks_in_khz = pclk_vol_table->entries[i].clk;
++ clocks->data[i].clocks_in_khz = pclk_vol_table->entries[i].clk * 10;
+ clocks->data[i].voltage_in_mv = pclk_vol_table->entries[i].vol;
+ clocks->num_levels++;
+ }
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+index 0e3f3bb..843dba9 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+@@ -4065,7 +4065,7 @@ static void vega10_get_sclks(struct pp_hwmgr *hwmgr,
+ for (i = 0; i < dep_table->count; i++) {
+ if (dep_table->entries[i].clk) {
+ clocks->data[clocks->num_levels].clocks_in_khz =
+- dep_table->entries[i].clk;
++ dep_table->entries[i].clk * 10;
+ clocks->num_levels++;
+ }
+ }
+@@ -4102,7 +4102,7 @@ static void vega10_get_memclocks(struct pp_hwmgr *hwmgr,
+ clocks->data[clocks->num_levels].clocks_in_khz =
+ data->mclk_latency_table.entries
+ [data->mclk_latency_table.count].frequency =
+- dep_table->entries[i].clk;
++ dep_table->entries[i].clk * 10;
+ clocks->data[clocks->num_levels].latency_in_us =
+ data->mclk_latency_table.entries
+ [data->mclk_latency_table.count].latency =
+@@ -4124,7 +4124,7 @@ static void vega10_get_dcefclocks(struct pp_hwmgr *hwmgr,
+ uint32_t i;
+
+ for (i = 0; i < dep_table->count; i++) {
+- clocks->data[i].clocks_in_khz = dep_table->entries[i].clk;
++ clocks->data[i].clocks_in_khz = dep_table->entries[i].clk * 10;
+ clocks->data[i].latency_in_us = 0;
+ clocks->num_levels++;
+ }
+@@ -4140,7 +4140,7 @@ static void vega10_get_socclocks(struct pp_hwmgr *hwmgr,
+ uint32_t i;
+
+ for (i = 0; i < dep_table->count; i++) {
+- clocks->data[i].clocks_in_khz = dep_table->entries[i].clk;
++ clocks->data[i].clocks_in_khz = dep_table->entries[i].clk * 10;
+ clocks->data[i].latency_in_us = 0;
+ clocks->num_levels++;
+ }
+@@ -4200,7 +4200,7 @@ static int vega10_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr,
+ }
+
+ for (i = 0; i < dep_table->count; i++) {
+- clocks->data[i].clocks_in_khz = dep_table->entries[i].clk;
++ clocks->data[i].clocks_in_khz = dep_table->entries[i].clk * 10;
+ clocks->data[i].voltage_in_mv = (uint32_t)(table_info->vddc_lookup_table->
+ entries[dep_table->entries[i].vddInd].us_vdd);
+ clocks->num_levels++;
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
+index 782e209..d685ce7 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
+@@ -1576,7 +1576,7 @@ static int vega12_get_sclks(struct pp_hwmgr *hwmgr,
+
+ for (i = 0; i < ucount; i++) {
+ clocks->data[i].clocks_in_khz =
+- dpm_table->dpm_levels[i].value * 100;
++ dpm_table->dpm_levels[i].value * 1000;
+
+ clocks->data[i].latency_in_us = 0;
+ }
+@@ -1608,7 +1608,7 @@ static int vega12_get_memclocks(struct pp_hwmgr *hwmgr,
+
+ for (i = 0; i < ucount; i++) {
+ clocks->data[i].clocks_in_khz =
+- dpm_table->dpm_levels[i].value * 100;
++ dpm_table->dpm_levels[i].value * 1000;
+
+ clocks->data[i].latency_in_us =
+ data->mclk_latency_table.entries[i].latency =
+@@ -1638,7 +1638,7 @@ static int vega12_get_dcefclocks(struct pp_hwmgr *hwmgr,
+
+ for (i = 0; i < ucount; i++) {
+ clocks->data[i].clocks_in_khz =
+- dpm_table->dpm_levels[i].value * 100;
++ dpm_table->dpm_levels[i].value * 1000;
+
+ clocks->data[i].latency_in_us = 0;
+ }
+@@ -1666,7 +1666,7 @@ static int vega12_get_socclocks(struct pp_hwmgr *hwmgr,
+
+ for (i = 0; i < ucount; i++) {
+ clocks->data[i].clocks_in_khz =
+- dpm_table->dpm_levels[i].value * 100;
++ dpm_table->dpm_levels[i].value * 1000;
+
+ clocks->data[i].latency_in_us = 0;
+ }
+@@ -1838,7 +1838,7 @@ static int vega12_print_clock_levels(struct pp_hwmgr *hwmgr,
+ return -1);
+ for (i = 0; i < clocks.num_levels; i++)
+ size += sprintf(buf + size, "%d: %uMhz %s\n",
+- i, clocks.data[i].clocks_in_khz / 100,
++ i, clocks.data[i].clocks_in_khz / 1000,
+ (clocks.data[i].clocks_in_khz == now) ? "*" : "");
+ break;
+
+--
+2.7.4
+