diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4483-drm-amdgpu-fix-insert-nop-for-UVD5-ring.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4483-drm-amdgpu-fix-insert-nop-for-UVD5-ring.patch | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4483-drm-amdgpu-fix-insert-nop-for-UVD5-ring.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4483-drm-amdgpu-fix-insert-nop-for-UVD5-ring.patch new file mode 100644 index 00000000..ce0a1b7c --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4483-drm-amdgpu-fix-insert-nop-for-UVD5-ring.patch @@ -0,0 +1,60 @@ +From 08fee9e5fc38ce4a48413a2716d689510b91a8d1 Mon Sep 17 00:00:00 2001 +From: Leo Liu <leo.liu@amd.com> +Date: Thu, 17 May 2018 13:52:00 -0400 +Subject: [PATCH 4483/5725] drm/amdgpu: fix insert nop for UVD5 ring +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +NO_OP register should be writen to 0 + +Signed-off-by: Leo Liu <leo.liu@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Christian König <christian.koenig@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 15 +++++++++++++-- + 1 file changed, 13 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c +index 01810f2..693944f 100644 +--- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c +@@ -567,6 +567,18 @@ static void uvd_v5_0_ring_emit_ib(struct amdgpu_ring *ring, + amdgpu_ring_write(ring, ib->length_dw); + } + ++static void uvd_v5_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) ++{ ++ int i; ++ ++ WARN_ON(ring->wptr % 2 || count % 2); ++ ++ for (i = 0; i < count / 2; i++) { ++ amdgpu_ring_write(ring, PACKET0(mmUVD_NO_OP, 0)); ++ amdgpu_ring_write(ring, 0); ++ } ++} ++ + static bool uvd_v5_0_is_idle(void *handle) + { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; +@@ -867,7 +879,6 @@ static const struct amd_ip_funcs uvd_v5_0_ip_funcs = { + static const struct amdgpu_ring_funcs uvd_v5_0_ring_funcs = { + .type = AMDGPU_RING_TYPE_UVD, + .align_mask = 0xf, +- .nop = PACKET0(mmUVD_NO_OP, 0), + .support_64bit_ptrs = false, + .get_rptr = uvd_v5_0_ring_get_rptr, + .get_wptr = uvd_v5_0_ring_get_wptr, +@@ -884,7 +895,7 @@ static const struct amdgpu_ring_funcs uvd_v5_0_ring_funcs = { + .emit_hdp_invalidate = uvd_v5_0_ring_emit_hdp_invalidate, + .test_ring = uvd_v5_0_ring_test_ring, + .test_ib = amdgpu_uvd_ring_test_ib, +- .insert_nop = amdgpu_ring_insert_nop, ++ .insert_nop = uvd_v5_0_ring_insert_nop, + .pad_ib = amdgpu_ring_generic_pad_ib, + .begin_use = amdgpu_uvd_ring_begin_use, + .end_use = amdgpu_uvd_ring_end_use, +-- +2.7.4 + |