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Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4481-drm-amdgpu-fix-insert-nop-for-UVD7-ring.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.14.71/4481-drm-amdgpu-fix-insert-nop-for-UVD7-ring.patch51
1 files changed, 51 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4481-drm-amdgpu-fix-insert-nop-for-UVD7-ring.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4481-drm-amdgpu-fix-insert-nop-for-UVD7-ring.patch
new file mode 100644
index 00000000..f396d58a
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4481-drm-amdgpu-fix-insert-nop-for-UVD7-ring.patch
@@ -0,0 +1,51 @@
+From e587fa5662d5616531487a5b9b527f8cf7316e87 Mon Sep 17 00:00:00 2001
+From: Leo Liu <leo.liu@amd.com>
+Date: Thu, 17 May 2018 13:37:50 -0400
+Subject: [PATCH 4481/5725] drm/amdgpu: fix insert nop for UVD7 ring
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+NO_OP register should be writen to 0
+
+Signed-off-by: Leo Liu <leo.liu@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Reviewed-by: Christian König <christian.koenig@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 10 ++++++----
+ 1 file changed, 6 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
+index a0080d7..78b5111 100644
+--- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
+@@ -1346,12 +1346,15 @@ static void uvd_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
+
+ static void uvd_v7_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
+ {
+- int i;
+ struct amdgpu_device *adev = ring->adev;
++ int i;
+
+- for (i = 0; i < count; i++)
+- amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_NO_OP), 0));
++ WARN_ON(ring->wptr % 2 || count % 2);
+
++ for (i = 0; i < count / 2; i++) {
++ amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_NO_OP), 0));
++ amdgpu_ring_write(ring, 0);
++ }
+ }
+
+ static void uvd_v7_0_enc_ring_insert_end(struct amdgpu_ring *ring)
+@@ -1731,7 +1734,6 @@ const struct amd_ip_funcs uvd_v7_0_ip_funcs = {
+ static const struct amdgpu_ring_funcs uvd_v7_0_ring_vm_funcs = {
+ .type = AMDGPU_RING_TYPE_UVD,
+ .align_mask = 0xf,
+- .nop = PACKET0(0x81ff, 0),
+ .support_64bit_ptrs = false,
+ .vmhub = AMDGPU_MMHUB,
+ .get_rptr = uvd_v7_0_ring_get_rptr,
+--
+2.7.4
+