diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4480-drm-amdgpu-fix-insert-nop-for-VCN-decode-ring.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4480-drm-amdgpu-fix-insert-nop-for-VCN-decode-ring.patch | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4480-drm-amdgpu-fix-insert-nop-for-VCN-decode-ring.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4480-drm-amdgpu-fix-insert-nop-for-VCN-decode-ring.patch new file mode 100644 index 00000000..f3c249bc --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4480-drm-amdgpu-fix-insert-nop-for-VCN-decode-ring.patch @@ -0,0 +1,63 @@ +From 5533e9bfa2a352f2add239f6d516704183319691 Mon Sep 17 00:00:00 2001 +From: Leo Liu <leo.liu@amd.com> +Date: Thu, 17 May 2018 13:31:49 -0400 +Subject: [PATCH 4480/5725] drm/amdgpu: fix insert nop for VCN decode ring +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +NO_OP register should be writen to 0 + +Signed-off-by: Leo Liu <leo.liu@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Christian König <christian.koenig@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 14 ++++++++------ + 1 file changed, 8 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c +index bc00178..c8db6ad 100644 +--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c +@@ -1085,14 +1085,17 @@ static int vcn_v1_0_process_interrupt(struct amdgpu_device *adev, + return 0; + } + +-static void vcn_v1_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) ++static void vcn_v1_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) + { +- int i; + struct amdgpu_device *adev = ring->adev; ++ int i; + +- for (i = 0; i < count; i++) +- amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_NO_OP), 0)); ++ WARN_ON(ring->wptr % 2 || count % 2); + ++ for (i = 0; i < count / 2; i++) { ++ amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_NO_OP), 0)); ++ amdgpu_ring_write(ring, 0); ++ } + } + + +@@ -1119,7 +1122,6 @@ static const struct amd_ip_funcs vcn_v1_0_ip_funcs = { + static const struct amdgpu_ring_funcs vcn_v1_0_dec_ring_vm_funcs = { + .type = AMDGPU_RING_TYPE_VCN_DEC, + .align_mask = 0xf, +- .nop = PACKET0(0x81ff, 0), + .support_64bit_ptrs = false, + .vmhub = AMDGPU_MMHUB, + .get_rptr = vcn_v1_0_dec_ring_get_rptr, +@@ -1139,7 +1141,7 @@ static const struct amdgpu_ring_funcs vcn_v1_0_dec_ring_vm_funcs = { + .emit_hdp_invalidate = vcn_v1_0_dec_ring_emit_hdp_invalidate, + .test_ring = amdgpu_vcn_dec_ring_test_ring, + .test_ib = amdgpu_vcn_dec_ring_test_ib, +- .insert_nop = vcn_v1_0_ring_insert_nop, ++ .insert_nop = vcn_v1_0_dec_ring_insert_nop, + .insert_start = vcn_v1_0_dec_ring_insert_start, + .insert_end = vcn_v1_0_dec_ring_insert_end, + .pad_ib = amdgpu_ring_generic_pad_ib, +-- +2.7.4 + |