diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4436-drm-amdgpu-vg20-Enable-2nd-instance-queue-maping-for.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4436-drm-amdgpu-vg20-Enable-2nd-instance-queue-maping-for.patch | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4436-drm-amdgpu-vg20-Enable-2nd-instance-queue-maping-for.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4436-drm-amdgpu-vg20-Enable-2nd-instance-queue-maping-for.patch new file mode 100644 index 00000000..a932314e --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4436-drm-amdgpu-vg20-Enable-2nd-instance-queue-maping-for.patch @@ -0,0 +1,69 @@ +From 53c04cd97b0d585d6d72d8f9d6ffd7ae41d19be0 Mon Sep 17 00:00:00 2001 +From: James Zhu <James.Zhu@amd.com> +Date: Mon, 23 Apr 2018 21:00:58 -0400 +Subject: [PATCH 4436/5725] drm/amdgpu/vg20:Enable 2nd instance queue maping + for uvd 7.2 + +Enable 2nd instance uvd queue maping for uvd 7.2. For user, only one UVD +instance presents. there is two rings for uvd decode, and +4 rings for uvd encode. + +Signed-off-by: James Zhu <James.Zhu@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c | 14 ++++++++++---- + 1 file changed, 10 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c +index 2458d38..8af16e8 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c +@@ -66,6 +66,8 @@ static int amdgpu_identity_map(struct amdgpu_device *adev, + u32 ring, + struct amdgpu_ring **out_ring) + { ++ u32 instance; ++ + switch (mapper->hw_ip) { + case AMDGPU_HW_IP_GFX: + *out_ring = &adev->gfx.gfx_ring[ring]; +@@ -77,13 +79,16 @@ static int amdgpu_identity_map(struct amdgpu_device *adev, + *out_ring = &adev->sdma.instance[ring].ring; + break; + case AMDGPU_HW_IP_UVD: +- *out_ring = &adev->uvd.inst->ring; ++ instance = ring; ++ *out_ring = &adev->uvd.inst[instance].ring; + break; + case AMDGPU_HW_IP_VCE: + *out_ring = &adev->vce.ring[ring]; + break; + case AMDGPU_HW_IP_UVD_ENC: +- *out_ring = &adev->uvd.inst->ring_enc[ring]; ++ instance = ring / adev->uvd.num_enc_rings; ++ *out_ring = ++ &adev->uvd.inst[instance].ring_enc[ring%adev->uvd.num_enc_rings]; + break; + case AMDGPU_HW_IP_VCN_DEC: + *out_ring = &adev->vcn.ring_dec; +@@ -240,13 +245,14 @@ int amdgpu_queue_mgr_map(struct amdgpu_device *adev, + ip_num_rings = adev->sdma.num_instances; + break; + case AMDGPU_HW_IP_UVD: +- ip_num_rings = 1; ++ ip_num_rings = adev->uvd.num_uvd_inst; + break; + case AMDGPU_HW_IP_VCE: + ip_num_rings = adev->vce.num_rings; + break; + case AMDGPU_HW_IP_UVD_ENC: +- ip_num_rings = adev->uvd.num_enc_rings; ++ ip_num_rings = ++ adev->uvd.num_enc_rings * adev->uvd.num_uvd_inst; + break; + case AMDGPU_HW_IP_VCN_DEC: + ip_num_rings = 1; +-- +2.7.4 + |