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Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4435-drm-amdgpu-vg20-Enable-the-2nd-instance-IRQ-for-uvd-.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.14.71/4435-drm-amdgpu-vg20-Enable-the-2nd-instance-IRQ-for-uvd-.patch61
1 files changed, 61 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4435-drm-amdgpu-vg20-Enable-the-2nd-instance-IRQ-for-uvd-.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4435-drm-amdgpu-vg20-Enable-the-2nd-instance-IRQ-for-uvd-.patch
new file mode 100644
index 00000000..5c7d9f11
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4435-drm-amdgpu-vg20-Enable-the-2nd-instance-IRQ-for-uvd-.patch
@@ -0,0 +1,61 @@
+From ecb8fd50b8366505079e3bc405b3f21fd01cdd89 Mon Sep 17 00:00:00 2001
+From: James Zhu <James.Zhu@amd.com>
+Date: Mon, 23 Apr 2018 20:56:01 -0400
+Subject: [PATCH 4435/5725] drm/amdgpu/vg20:Enable the 2nd instance IRQ for uvd
+ 7.2
+
+For Vega20, the 2nd instance uvd IRQ using different client id.
+Enable the 2nd instance IRQ for uvd 7.2
+
+Signed-off-by: James Zhu <James.Zhu@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 12 ++++++++++--
+ 1 file changed, 10 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
+index bc4db67..47a6af5 100644
+--- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
+@@ -49,6 +49,11 @@ static int uvd_v7_0_start(struct amdgpu_device *adev);
+ static void uvd_v7_0_stop(struct amdgpu_device *adev);
+ static int uvd_v7_0_sriov_start(struct amdgpu_device *adev);
+
++static int amdgpu_ih_clientid_uvds[] = {
++ SOC15_IH_CLIENTID_UVD,
++ SOC15_IH_CLIENTID_UVD1
++};
++
+ /**
+ * uvd_v7_0_ring_get_rptr - get read pointer
+ *
+@@ -397,13 +402,13 @@ static int uvd_v7_0_sw_init(void *handle)
+
+ for (j = 0; j < adev->uvd.num_uvd_inst; j++) {
+ /* UVD TRAP */
+- r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_UVD, 124, &adev->uvd.inst[j].irq);
++ r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_uvds[j], 124, &adev->uvd.inst[j].irq);
+ if (r)
+ return r;
+
+ /* UVD ENC TRAP */
+ for (i = 0; i < adev->uvd.num_enc_rings; ++i) {
+- r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_UVD, i + 119, &adev->uvd.inst[j].irq);
++ r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_uvds[j], i + 119, &adev->uvd.inst[j].irq);
+ if (r)
+ return r;
+ }
+@@ -1501,6 +1506,9 @@ static int uvd_v7_0_process_interrupt(struct amdgpu_device *adev,
+ case SOC15_IH_CLIENTID_UVD:
+ ip_instance = 0;
+ break;
++ case SOC15_IH_CLIENTID_UVD1:
++ ip_instance = 1;
++ break;
+ default:
+ DRM_ERROR("Unhandled client id: %d\n", entry->client_id);
+ return 0;
+--
+2.7.4
+