aboutsummaryrefslogtreecommitdiffstats
path: root/common/recipes-kernel/linux/linux-yocto-4.14.71/4411-drm-amdgpu-Add-nbio-support-for-vega20-v2.patch
diff options
context:
space:
mode:
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4411-drm-amdgpu-Add-nbio-support-for-vega20-v2.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.14.71/4411-drm-amdgpu-Add-nbio-support-for-vega20-v2.patch86
1 files changed, 86 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4411-drm-amdgpu-Add-nbio-support-for-vega20-v2.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4411-drm-amdgpu-Add-nbio-support-for-vega20-v2.patch
new file mode 100644
index 00000000..1622d2a1
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4411-drm-amdgpu-Add-nbio-support-for-vega20-v2.patch
@@ -0,0 +1,86 @@
+From d5b0a4f04720bc2af575bb8e6abe080823ae2fef Mon Sep 17 00:00:00 2001
+From: Feifei Xu <Feifei.Xu@amd.com>
+Date: Fri, 23 Mar 2018 14:44:28 -0500
+Subject: [PATCH 4411/5725] drm/amdgpu: Add nbio support for vega20 (v2)
+
+Some register offset in nbio v7.4 are different with v7.0.
+
+v2: Use nbio7.0 for now.
+
+TODO: add a new nbio 7.4 module (Alex)
+
+Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
+Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c | 18 +++++++++++++++++-
+ drivers/gpu/drm/amd/amdgpu/soc15.c | 2 ++
+ 2 files changed, 19 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
+index df34dc7..365517c 100644
+--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
+@@ -34,10 +34,19 @@
+ #define smnCPM_CONTROL 0x11180460
+ #define smnPCIE_CNTL2 0x11180070
+
++/* vega20 */
++#define mmRCC_DEV0_EPF0_STRAP0_VG20 0x0011
++#define mmRCC_DEV0_EPF0_STRAP0_VG20_BASE_IDX 2
++
+ static u32 nbio_v7_0_get_rev_id(struct amdgpu_device *adev)
+ {
+ u32 tmp = RREG32_SOC15(NBIO, 0, mmRCC_DEV0_EPF0_STRAP0);
+
++ if (adev->asic_type == CHIP_VEGA20)
++ tmp = RREG32_SOC15(NBIO, 0, mmRCC_DEV0_EPF0_STRAP0_VG20);
++ else
++ tmp = RREG32_SOC15(NBIO, 0, mmRCC_DEV0_EPF0_STRAP0);
++
+ tmp &= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0_MASK;
+ tmp >>= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0__SHIFT;
+
+@@ -75,10 +84,14 @@ static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instan
+ SOC15_REG_OFFSET(NBIO, 0, mmBIF_SDMA1_DOORBELL_RANGE);
+
+ u32 doorbell_range = RREG32(reg);
++ u32 range = 2;
++
++ if (adev->asic_type == CHIP_VEGA20)
++ range = 8;
+
+ if (use_doorbell) {
+ doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index);
+- doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 2);
++ doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, range);
+ } else
+ doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0);
+
+@@ -133,6 +146,9 @@ static void nbio_v7_0_update_medium_grain_clock_gating(struct amdgpu_device *ade
+ {
+ uint32_t def, data;
+
++ if (adev->asic_type == CHIP_VEGA20)
++ return;
++
+ /* NBIF_MGCG_CTRL_LCLK */
+ def = data = RREG32_PCIE(smnNBIF_MGCG_CTRL_LCLK);
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
+index 10337fb..4e065c6 100644
+--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
++++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
+@@ -496,6 +496,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
+
+ if (adev->flags & AMD_IS_APU)
+ adev->nbio_funcs = &nbio_v7_0_funcs;
++ else if (adev->asic_type == CHIP_VEGA20)
++ adev->nbio_funcs = &nbio_v7_0_funcs;
+ else
+ adev->nbio_funcs = &nbio_v6_1_funcs;
+
+--
+2.7.4
+