diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4303-drm-amdgpu-set-COMPUTE_PGM_RSRC1-for-SGPR-VGPR-clear.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4303-drm-amdgpu-set-COMPUTE_PGM_RSRC1-for-SGPR-VGPR-clear.patch | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4303-drm-amdgpu-set-COMPUTE_PGM_RSRC1-for-SGPR-VGPR-clear.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4303-drm-amdgpu-set-COMPUTE_PGM_RSRC1-for-SGPR-VGPR-clear.patch new file mode 100644 index 00000000..23226725 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4303-drm-amdgpu-set-COMPUTE_PGM_RSRC1-for-SGPR-VGPR-clear.patch @@ -0,0 +1,61 @@ +From 5fa5d542021ba3f890da59d79c01043fc1b29068 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?= <nicolai.haehnle@amd.com> +Date: Thu, 12 Apr 2018 16:34:19 +0200 +Subject: [PATCH 4303/5725] drm/amdgpu: set COMPUTE_PGM_RSRC1 for SGPR/VGPR + clearing shaders +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Otherwise, the SQ may skip some of the register writes, or shader waves may +be allocated where we don't expect them, so that as a result we don't actually +reset all of the register SRAMs. This can lead to spurious ECC errors later on +if a shader uses an uninitialized register. + +Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +index 4c9ea8d..befc7a0 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +@@ -1459,10 +1459,11 @@ static const u32 sgpr_init_compute_shader[] = + static const u32 vgpr_init_regs[] = + { + mmCOMPUTE_STATIC_THREAD_MGMT_SE0, 0xffffffff, +- mmCOMPUTE_RESOURCE_LIMITS, 0, ++ mmCOMPUTE_RESOURCE_LIMITS, 0x1000000, /* CU_GROUP_COUNT=1 */ + mmCOMPUTE_NUM_THREAD_X, 256*4, + mmCOMPUTE_NUM_THREAD_Y, 1, + mmCOMPUTE_NUM_THREAD_Z, 1, ++ mmCOMPUTE_PGM_RSRC1, 0x100004f, /* VGPRS=15 (64 logical VGPRs), SGPRS=1 (16 SGPRs), BULKY=1 */ + mmCOMPUTE_PGM_RSRC2, 20, + mmCOMPUTE_USER_DATA_0, 0xedcedc00, + mmCOMPUTE_USER_DATA_1, 0xedcedc01, +@@ -1479,10 +1480,11 @@ static const u32 vgpr_init_regs[] = + static const u32 sgpr1_init_regs[] = + { + mmCOMPUTE_STATIC_THREAD_MGMT_SE0, 0x0f, +- mmCOMPUTE_RESOURCE_LIMITS, 0x1000000, ++ mmCOMPUTE_RESOURCE_LIMITS, 0x1000000, /* CU_GROUP_COUNT=1 */ + mmCOMPUTE_NUM_THREAD_X, 256*5, + mmCOMPUTE_NUM_THREAD_Y, 1, + mmCOMPUTE_NUM_THREAD_Z, 1, ++ mmCOMPUTE_PGM_RSRC1, 0x240, /* SGPRS=9 (80 GPRS) */ + mmCOMPUTE_PGM_RSRC2, 20, + mmCOMPUTE_USER_DATA_0, 0xedcedc00, + mmCOMPUTE_USER_DATA_1, 0xedcedc01, +@@ -1503,6 +1505,7 @@ static const u32 sgpr2_init_regs[] = + mmCOMPUTE_NUM_THREAD_X, 256*5, + mmCOMPUTE_NUM_THREAD_Y, 1, + mmCOMPUTE_NUM_THREAD_Z, 1, ++ mmCOMPUTE_PGM_RSRC1, 0x240, /* SGPRS=9 (80 GPRS) */ + mmCOMPUTE_PGM_RSRC2, 20, + mmCOMPUTE_USER_DATA_0, 0xedcedc00, + mmCOMPUTE_USER_DATA_1, 0xedcedc01, +-- +2.7.4 + |