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Diffstat (limited to 'common/dpdk/recipes-extended/dpdk/dpdk/dpdk-dev-v3-16-18-net-axgbe-add-support-for-build-32-bit-mode.patch')
-rw-r--r--common/dpdk/recipes-extended/dpdk/dpdk/dpdk-dev-v3-16-18-net-axgbe-add-support-for-build-32-bit-mode.patch308
1 files changed, 0 insertions, 308 deletions
diff --git a/common/dpdk/recipes-extended/dpdk/dpdk/dpdk-dev-v3-16-18-net-axgbe-add-support-for-build-32-bit-mode.patch b/common/dpdk/recipes-extended/dpdk/dpdk/dpdk-dev-v3-16-18-net-axgbe-add-support-for-build-32-bit-mode.patch
deleted file mode 100644
index 5b5535f1..00000000
--- a/common/dpdk/recipes-extended/dpdk/dpdk/dpdk-dev-v3-16-18-net-axgbe-add-support-for-build-32-bit-mode.patch
+++ /dev/null
@@ -1,308 +0,0 @@
-From patchwork Fri Mar 9 08:42:32 2018
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [dpdk-dev,v3,16/18] net/axgbe: add support for build 32-bit mode
-From: Ravi Kumar <ravi1.kumar@amd.com>
-X-Patchwork-Id: 35835
-X-Patchwork-Delegate: ferruh.yigit@intel.com
-Message-Id: <1520584954-130575-16-git-send-email-Ravi1.kumar@amd.com>
-List-Id: dev.dpdk.org
-To: dev@dpdk.org
-Cc: ferruh.yigit@intel.com
-Date: Fri, 9 Mar 2018 03:42:32 -0500
-
-Signed-off-by: Ravi Kumar <Ravi1.kumar@amd.com>
----
- doc/guides/nics/features/axgbe.ini | 1 +
- drivers/net/axgbe/axgbe_common.h | 53 ++++++++++++++++++++++----------------
- drivers/net/axgbe/axgbe_ethdev.c | 10 ++++---
- drivers/net/axgbe/axgbe_ethdev.h | 8 +++---
- drivers/net/axgbe/axgbe_rxtx.c | 12 ++++-----
- drivers/net/axgbe/axgbe_rxtx.h | 4 +--
- 6 files changed, 50 insertions(+), 38 deletions(-)
-
-diff --git a/doc/guides/nics/features/axgbe.ini b/doc/guides/nics/features/axgbe.ini
-index 042ff1e..ab4da55 100644
---- a/doc/guides/nics/features/axgbe.ini
-+++ b/doc/guides/nics/features/axgbe.ini
-@@ -15,4 +15,5 @@ L3 checksum offload = Y
- L4 checksum offload = Y
- Basic stats = Y
- Linux UIO = Y
-+x86-32 = Y
- x86-64 = Y
-diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_common.h
-index 294f2e4..189139b 100644
---- a/drivers/net/axgbe/axgbe_common.h
-+++ b/drivers/net/axgbe/axgbe_common.h
-@@ -1507,7 +1507,7 @@ do { \
- * register definitions formed using the input names
- */
- #define AXGMAC_IOREAD(_pdata, _reg) \
-- rte_read32((void *)((_pdata)->xgmac_regs + (_reg)))
-+ rte_read32((uint8_t *)((_pdata)->xgmac_regs) + (_reg))
-
- #define AXGMAC_IOREAD_BITS(_pdata, _reg, _field) \
- GET_BITS(AXGMAC_IOREAD((_pdata), _reg), \
-@@ -1515,7 +1515,8 @@ do { \
- _reg##_##_field##_WIDTH)
-
- #define AXGMAC_IOWRITE(_pdata, _reg, _val) \
-- rte_write32((_val), (void *)((_pdata)->xgmac_regs + (_reg)))
-+ rte_write32((_val), \
-+ (uint8_t *)((_pdata)->xgmac_regs) + (_reg))
-
- #define AXGMAC_IOWRITE_BITS(_pdata, _reg, _field, _val) \
- do { \
-@@ -1531,8 +1532,8 @@ do { \
- * base register value is calculated by the queue or traffic class number
- */
- #define AXGMAC_MTL_IOREAD(_pdata, _n, _reg) \
-- rte_read32((void *)((_pdata)->xgmac_regs + \
-- MTL_Q_BASE + ((_n) * MTL_Q_INC) + (_reg)))
-+ rte_read32((uint8_t *)((_pdata)->xgmac_regs) + \
-+ MTL_Q_BASE + ((_n) * MTL_Q_INC) + (_reg))
-
- #define AXGMAC_MTL_IOREAD_BITS(_pdata, _n, _reg, _field) \
- GET_BITS(AXGMAC_MTL_IOREAD((_pdata), (_n), (_reg)), \
-@@ -1540,8 +1541,8 @@ do { \
- _reg##_##_field##_WIDTH)
-
- #define AXGMAC_MTL_IOWRITE(_pdata, _n, _reg, _val) \
-- rte_write32((_val), (void *)((_pdata)->xgmac_regs + \
-- MTL_Q_BASE + ((_n) * MTL_Q_INC) + (_reg)))
-+ rte_write32((_val), (uint8_t *)((_pdata)->xgmac_regs) +\
-+ MTL_Q_BASE + ((_n) * MTL_Q_INC) + (_reg))
-
- #define AXGMAC_MTL_IOWRITE_BITS(_pdata, _n, _reg, _field, _val) \
- do { \
-@@ -1557,7 +1558,7 @@ do { \
- * base register value is obtained from the ring
- */
- #define AXGMAC_DMA_IOREAD(_channel, _reg) \
-- rte_read32((void *)((_channel)->dma_regs + (_reg)))
-+ rte_read32((uint8_t *)((_channel)->dma_regs) + (_reg))
-
- #define AXGMAC_DMA_IOREAD_BITS(_channel, _reg, _field) \
- GET_BITS(AXGMAC_DMA_IOREAD((_channel), _reg), \
-@@ -1565,7 +1566,8 @@ do { \
- _reg##_##_field##_WIDTH)
-
- #define AXGMAC_DMA_IOWRITE(_channel, _reg, _val) \
-- rte_write32((_val), (void *)((_channel)->dma_regs + (_reg)))
-+ rte_write32((_val), \
-+ (uint8_t *)((_channel)->dma_regs) + (_reg))
-
- #define AXGMAC_DMA_IOWRITE_BITS(_channel, _reg, _field, _val) \
- do { \
-@@ -1590,16 +1592,18 @@ do { \
- _prefix##_##_field##_WIDTH, (_val))
-
- #define XPCS32_IOWRITE(_pdata, _off, _val) \
-- rte_write32(_val, (void *)((_pdata)->xpcs_regs + (_off)))
-+ rte_write32(_val, \
-+ (uint8_t *)((_pdata)->xpcs_regs) + (_off))
-
- #define XPCS32_IOREAD(_pdata, _off) \
-- rte_read32((void *)((_pdata)->xpcs_regs + (_off)))
-+ rte_read32((uint8_t *)((_pdata)->xpcs_regs) + (_off))
-
- #define XPCS16_IOWRITE(_pdata, _off, _val) \
-- rte_write16(_val, (void *)((_pdata)->xpcs_regs + (_off)))
-+ rte_write16(_val, \
-+ (uint8_t *)((_pdata)->xpcs_regs) + (_off))
-
- #define XPCS16_IOREAD(_pdata, _off) \
-- rte_read16((void *)((_pdata)->xpcs_regs + (_off)))
-+ rte_read16((uint8_t *)((_pdata)->xpcs_regs) + (_off))
-
- /* Macros for building, reading or writing register values or bits
- * within the register values of SerDes integration registers.
-@@ -1615,7 +1619,7 @@ do { \
- _prefix##_##_field##_WIDTH, (_val))
-
- #define XSIR0_IOREAD(_pdata, _reg) \
-- rte_read16((void *)((_pdata)->sir0_regs + (_reg)))
-+ rte_read16((uint8_t *)((_pdata)->sir0_regs) + (_reg))
-
- #define XSIR0_IOREAD_BITS(_pdata, _reg, _field) \
- GET_BITS(XSIR0_IOREAD((_pdata), _reg), \
-@@ -1623,7 +1627,8 @@ do { \
- _reg##_##_field##_WIDTH)
-
- #define XSIR0_IOWRITE(_pdata, _reg, _val) \
-- rte_write16((_val), (void *)((_pdata)->sir0_regs + (_reg)))
-+ rte_write16((_val), \
-+ (uint8_t *)((_pdata)->sir0_regs) + (_reg))
-
- #define XSIR0_IOWRITE_BITS(_pdata, _reg, _field, _val) \
- do { \
-@@ -1635,7 +1640,7 @@ do { \
- } while (0)
-
- #define XSIR1_IOREAD(_pdata, _reg) \
-- rte_read16((void *)((_pdata)->sir1_regs + _reg))
-+ rte_read16((uint8_t *)((_pdata)->sir1_regs) + _reg)
-
- #define XSIR1_IOREAD_BITS(_pdata, _reg, _field) \
- GET_BITS(XSIR1_IOREAD((_pdata), _reg), \
-@@ -1643,7 +1648,8 @@ do { \
- _reg##_##_field##_WIDTH)
-
- #define XSIR1_IOWRITE(_pdata, _reg, _val) \
-- rte_write16((_val), (void *)((_pdata)->sir1_regs + (_reg)))
-+ rte_write16((_val), \
-+ (uint8_t *)((_pdata)->sir1_regs) + (_reg))
-
- #define XSIR1_IOWRITE_BITS(_pdata, _reg, _field, _val) \
- do { \
-@@ -1658,7 +1664,7 @@ do { \
- * within the register values of SerDes RxTx registers.
- */
- #define XRXTX_IOREAD(_pdata, _reg) \
-- rte_read16((void *)((_pdata)->rxtx_regs + (_reg)))
-+ rte_read16((uint8_t *)((_pdata)->rxtx_regs) + (_reg))
-
- #define XRXTX_IOREAD_BITS(_pdata, _reg, _field) \
- GET_BITS(XRXTX_IOREAD((_pdata), _reg), \
-@@ -1666,7 +1672,8 @@ do { \
- _reg##_##_field##_WIDTH)
-
- #define XRXTX_IOWRITE(_pdata, _reg, _val) \
-- rte_write16((_val), (void *)((_pdata)->rxtx_regs + (_reg)))
-+ rte_write16((_val), \
-+ (uint8_t *)((_pdata)->rxtx_regs) + (_reg))
-
- #define XRXTX_IOWRITE_BITS(_pdata, _reg, _field, _val) \
- do { \
-@@ -1691,7 +1698,7 @@ do { \
- _prefix##_##_field##_WIDTH, (_val))
-
- #define XP_IOREAD(_pdata, _reg) \
-- rte_read32((void *)((_pdata)->xprop_regs + (_reg)))
-+ rte_read32((uint8_t *)((_pdata)->xprop_regs) + (_reg))
-
- #define XP_IOREAD_BITS(_pdata, _reg, _field) \
- GET_BITS(XP_IOREAD((_pdata), (_reg)), \
-@@ -1699,7 +1706,8 @@ do { \
- _reg##_##_field##_WIDTH)
-
- #define XP_IOWRITE(_pdata, _reg, _val) \
-- rte_write32((_val), (void *)((_pdata)->xprop_regs + (_reg)))
-+ rte_write32((_val), \
-+ (uint8_t *)((_pdata)->xprop_regs) + (_reg))
-
- #define XP_IOWRITE_BITS(_pdata, _reg, _field, _val) \
- do { \
-@@ -1724,7 +1732,7 @@ do { \
- _prefix##_##_field##_WIDTH, (_val))
-
- #define XI2C_IOREAD(_pdata, _reg) \
-- rte_read32((void *)((_pdata)->xi2c_regs + (_reg)))
-+ rte_read32((uint8_t *)((_pdata)->xi2c_regs) + (_reg))
-
- #define XI2C_IOREAD_BITS(_pdata, _reg, _field) \
- GET_BITS(XI2C_IOREAD((_pdata), (_reg)), \
-@@ -1732,7 +1740,8 @@ do { \
- _reg##_##_field##_WIDTH)
-
- #define XI2C_IOWRITE(_pdata, _reg, _val) \
-- rte_write32((_val), (void *)((_pdata)->xi2c_regs + (_reg)))
-+ rte_write32((_val), \
-+ (uint8_t *)((_pdata)->xi2c_regs) + (_reg))
-
- #define XI2C_IOWRITE_BITS(_pdata, _reg, _field, _val) \
- do { \
-diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
-index 9e5114b..d4d437a 100644
---- a/drivers/net/axgbe/axgbe_ethdev.c
-+++ b/drivers/net/axgbe/axgbe_ethdev.c
-@@ -712,10 +712,12 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
- pdata->pci_dev = pci_dev;
-
- pdata->xgmac_regs =
-- (uint64_t)pci_dev->mem_resource[AXGBE_AXGMAC_BAR].addr;
-- pdata->xprop_regs = pdata->xgmac_regs + AXGBE_MAC_PROP_OFFSET;
-- pdata->xi2c_regs = pdata->xgmac_regs + AXGBE_I2C_CTRL_OFFSET;
-- pdata->xpcs_regs = (uint64_t)pci_dev->mem_resource[AXGBE_XPCS_BAR].addr;
-+ (void *)pci_dev->mem_resource[AXGBE_AXGMAC_BAR].addr;
-+ pdata->xprop_regs = (void *)((uint8_t *)pdata->xgmac_regs
-+ + AXGBE_MAC_PROP_OFFSET);
-+ pdata->xi2c_regs = (void *)((uint8_t *)pdata->xgmac_regs
-+ + AXGBE_I2C_CTRL_OFFSET);
-+ pdata->xpcs_regs = (void *)pci_dev->mem_resource[AXGBE_XPCS_BAR].addr;
-
- /* version specific driver data*/
- if (pci_dev->id.device_id == 0x1458)
-diff --git a/drivers/net/axgbe/axgbe_ethdev.h b/drivers/net/axgbe/axgbe_ethdev.h
-index 4091d1a..91260ca 100644
---- a/drivers/net/axgbe/axgbe_ethdev.h
-+++ b/drivers/net/axgbe/axgbe_ethdev.h
-@@ -567,10 +567,10 @@ struct axgbe_port {
- struct axgbe_version_data *vdata;
-
- /* AXGMAC/XPCS related mmio registers */
-- uint64_t xgmac_regs; /* AXGMAC CSRs */
-- uint64_t xpcs_regs; /* XPCS MMD registers */
-- uint64_t xprop_regs; /* AXGBE property registers */
-- uint64_t xi2c_regs; /* AXGBE I2C CSRs */
-+ void *xgmac_regs; /* AXGMAC CSRs */
-+ void *xpcs_regs; /* XPCS MMD registers */
-+ void *xprop_regs; /* AXGBE property registers */
-+ void *xi2c_regs; /* AXGBE I2C CSRs */
-
- /* XPCS indirect addressing lock */
- unsigned int xpcs_window_def_reg;
-diff --git a/drivers/net/axgbe/axgbe_rxtx.c b/drivers/net/axgbe/axgbe_rxtx.c
-index c616fc1..4c38e47 100644
---- a/drivers/net/axgbe/axgbe_rxtx.c
-+++ b/drivers/net/axgbe/axgbe_rxtx.c
-@@ -192,9 +192,9 @@ int axgbe_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
- rxq->queue_id = queue_idx;
- rxq->port_id = dev->data->port_id;
- rxq->nb_desc = rx_desc;
-- rxq->dma_regs = pdata->xgmac_regs + DMA_CH_BASE +
-- (DMA_CH_INC * rxq->queue_id);
-- rxq->dma_tail_reg = (volatile uint32_t *)(rxq->dma_regs +
-+ rxq->dma_regs = (void *)((uint8_t *)pdata->xgmac_regs + DMA_CH_BASE +
-+ (DMA_CH_INC * rxq->queue_id));
-+ rxq->dma_tail_reg = (volatile uint32_t *)((uint8_t *)rxq->dma_regs +
- DMA_CH_RDTR_LO);
-
- rxq->crc_len = (uint8_t)((dev->data->dev_conf.rxmode.hw_strip_crc) ? 0 :
-@@ -509,9 +509,9 @@ int axgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
- txq->desc = tz->addr;
- txq->queue_id = queue_idx;
- txq->port_id = dev->data->port_id;
-- txq->dma_regs = pdata->xgmac_regs + DMA_CH_BASE +
-- (DMA_CH_INC * txq->queue_id);
-- txq->dma_tail_reg = (volatile uint32_t *)(txq->dma_regs +
-+ txq->dma_regs = (void *)((uint8_t *)pdata->xgmac_regs + DMA_CH_BASE +
-+ (DMA_CH_INC * txq->queue_id));
-+ txq->dma_tail_reg = (volatile uint32_t *)((uint8_t *)txq->dma_regs +
- DMA_CH_TDTR_LO);
- txq->cur = 0;
- txq->dirty = 0;
-diff --git a/drivers/net/axgbe/axgbe_rxtx.h b/drivers/net/axgbe/axgbe_rxtx.h
-index 45aaf89..e7b3cfd 100644
---- a/drivers/net/axgbe/axgbe_rxtx.h
-+++ b/drivers/net/axgbe/axgbe_rxtx.h
-@@ -202,7 +202,7 @@ struct axgbe_rx_queue {
- /* Ring physical address */
- uint64_t ring_phys_addr;
- /* Dma Channel register address */
-- uint64_t dma_regs;
-+ void *dma_regs;
- /* Dma channel tail register address*/
- volatile uint32_t *dma_tail_reg;
- /* DPDK queue index */
-@@ -249,7 +249,7 @@ struct axgbe_tx_queue {
- /* Physical address of ring */
- uint64_t ring_phys_addr;
- /* Dma channel register space */
-- uint64_t dma_regs;
-+ void *dma_regs;
- /* Dma tail register address of ring*/
- volatile uint32_t *dma_tail_reg;
- /* Tx queue index/id*/
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-04-19 16:44:40 +0000