From c018204ed1246c0c2129cc2d48f444d89e926034 Mon Sep 17 00:00:00 2001 Message-Id: From: Darren Hart Date: Sat, 18 May 2013 14:45:54 -0700 Subject: [PATCH 1/4] gpio-sch: Add sch_gpio_resume_set_enable() Allow for enabling and disabling of the resume well GPIOs. The E6xx Atom CPUs multiplex the resume GPIO 2:0 lines with LVDS and individual board drivers need to be able to enable or disable the lines appropriately. Unfortunately, the information regarding if the pins are being used for LVDS or GPIO is board specific and may not be available to the gpio-sch driver at probe time. Signed-off-by: Darren Hart --- drivers/gpio/gpio-sch.c | 24 ++++++++++++++++++++++++ include/linux/gpio-sch.h | 6 ++++++ 2 files changed, 30 insertions(+) create mode 100644 include/linux/gpio-sch.h diff --git a/drivers/gpio/gpio-sch.c b/drivers/gpio/gpio-sch.c index 5af6571..90785f8 100644 --- a/drivers/gpio/gpio-sch.c +++ b/drivers/gpio/gpio-sch.c @@ -41,6 +41,30 @@ static DEFINE_SPINLOCK(gpio_lock); static unsigned short gpio_ba; +void sch_gpio_resume_set_enable(unsigned gpio_num, int val) +{ + u8 curr_en; + unsigned short offset, bit; + + spin_lock(&gpio_lock); + + offset = RGEN + gpio_num / 8; + bit = gpio_num % 8; + + curr_en = inb(gpio_ba + offset); + + if (val) { + if (!(curr_en & (1 << bit))) + outb(curr_en | (1 << bit), gpio_ba + offset); + } else { + if ((curr_en & (1 << bit))) + outb(curr_en & ~(1 << bit), gpio_ba + offset); + } + + spin_unlock(&gpio_lock); +} +EXPORT_SYMBOL_GPL(sch_gpio_resume_set_enable); + static int sch_gpio_core_direction_in(struct gpio_chip *gc, unsigned gpio_num) { u8 curr_dirs; diff --git a/include/linux/gpio-sch.h b/include/linux/gpio-sch.h new file mode 100644 index 0000000..79e042f --- /dev/null +++ b/include/linux/gpio-sch.h @@ -0,0 +1,6 @@ +#ifndef _LINUX_GPIO_SCH_ +#define _LINUX_GPIO_SCH_ + +void sch_gpio_resume_set_enable(unsigned gpio_num, int val); + +#endif /* _LINUX_GPIO_SCH_ */ -- 1.8.3.1