aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/MIPS-Make-the-die_lock-be-raw.patch
AgeCommit message (Collapse)Author
2011-07-26mips: sibyte: Add missing irq_mask functionBruce Ashfield
1/7 [ Author: Thomas Gleixner Email: tglx@linutronix.de Subject: mips: sibyte: Add missing irq_mask function Date: Sat, 23 Jul 2011 11:41:22 +0000 Crashes on free_irq() otherwise. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> ] 2/7 [ Author: Thomas Gleixner Email: tglx@linutronix.de Subject: mips: ftrace: Fix the CONFIG_DYNAMIC_FTRACE=n compile Date: Sat, 23 Jul 2011 11:41:23 +0000 arch/mips/kernel/ftrace.c: In function ‘ftrace_get_parent_ra_addr’: arch/mips/kernel/ftrace.c:212: error: implicit declaration of function ‘in_kernel_space’ arch/mips/kernel/ftrace.c: In function ‘prepare_ftrace_return’: arch/mips/kernel/ftrace.c:314: error: ‘MCOUNT_OFFSET_INSNS’ undeclared (first use in this function) arch/mips/kernel/ftrace.c:314: error: (Each undeclared identifier is reported only once arch/mips/kernel/ftrace.c:314: error: for each function it appears in.) Signed-off-by: Thomas Gleixner <tglx@linutronix.de> ] 3/7 [ Author: Thomas Gleixner Email: tglx@linutronix.de Subject: mips: Enable interrupts in do_signal() Date: Sat, 23 Jul 2011 11:41:23 +0000 do_signal() does __put_user() which can fault, resulting in a might_sleep() warning in down_read(&mm->mmap_sem) and a "scheduling while atomic" warning when mmap_sem is contented. On swarm this also results in: WARNING: at kernel/smp.c:459 smp_call_function_many+0x148/0x398() Modules linked in: Call Trace: [<ffffffff804b48a4>] dump_stack+0x1c/0x50 [<ffffffff8013dc94>] warn_slowpath_common+0x8c/0xc8 [<ffffffff8013dcfc>] warn_slowpath_null+0x2c/0x40 [<ffffffff801864a0>] smp_call_function_many+0x148/0x398 [<ffffffff80186748>] smp_call_function+0x58/0xa8 [<ffffffff80119b5c>] r4k_flush_data_cache_page+0x54/0xd8 [<ffffffff801f39bc>] handle_pte_fault+0xa9c/0xad0 [<ffffffff801f40d0>] handle_mm_fault+0x158/0x200 [<ffffffff80115548>] do_page_fault+0x218/0x3b0 [<ffffffff80102744>] ret_from_exception+0x0/0x10 [<ffffffff8010eb18>] copy_siginfo_to_user32+0x50/0x298 [<ffffffff8010edf0>] setup_rt_frame_32+0x90/0x250 [<ffffffff80106414>] do_notify_resume+0x154/0x358 [<ffffffff80102930>] work_notifysig+0xc/0x14 Enable interrupts in do_signal() before delivering signals. Might be done in the entry code before calling do_notify_resume(), but I leave that for the MIPS ASM wizards. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> ] 4/7 [ Author: Wu Zhangjin Email: wuzhangjin@gmail.com Subject: MIPS: Make the die_lock be raw Date: Sat, 23 Jul 2011 11:41:24 +0000 On preempt-rt this lock needs to be raw, so it does not get converted to a sleeping spinlock. Trying to sleep in a panic is not really desireable. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> ] 5/7 [ Author: Wu Zhangjin Email: wuzhangjin@gmail.com Subject: MIPS: Mark cascade and low level interrupts IRQF_NO_THREAD Date: Sat, 23 Jul 2011 11:41:24 +0000 Mark interrupts with no_action handler, cascade interrupts, low level interrupts (bus error, halt ..) with IRQF_NO_THREAD to exclude them from forced threading. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> ] 6/7 [ Author: Wu Zhangjin Email: wuzhangjin@gmail.com Subject: MIPS: Loongson: Mark cascade interrupts IRQF_NO_THREAD Date: Sat, 23 Jul 2011 11:41:24 +0000 There are two cascade interrupts in Loongson machines, one for bonito northbridge, another for the 8259A controller in the southbridge. Both want to be non threaded. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> ] 7/7 [ Author: Thomas Gleixner Email: tglx@linutronix.de Subject: mips: Allow forced irq threading Date: Sat, 23 Jul 2011 11:41:25 +0000 All low level interrupts have been marked NO_THREAD, so MIPS can enjoy the wonderful world of forced threaded interrupt handlers. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> ] Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>