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From 485b768977869e07005145ec36e59c97ea358090 Mon Sep 17 00:00:00 2001
From: Xiaojie Yuan <xiaojie.yuan@amd.com>
Date: Fri, 22 Nov 2019 11:37:39 +0800
Subject: [PATCH 4569/4736] Revert "drm/amdgpu/gfx10: re-init clear state
buffer after gpu reset"
there's a copy-paste error (!adev->in_gpu_reset), re-submit the patch
This reverts commit 61d914ea3925eb70960210d7e8df15b349942ddb.
Change-Id: Ib49e4a6e4016154a91b422fc6855517c7ad83b07
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 43 ++++----------------------
1 file changed, 6 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index a364f2f645c2..5403567683b7 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -1789,52 +1789,27 @@ static void gfx_v10_0_enable_gui_idle_interrupt(struct amdgpu_device *adev,
WREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0, tmp);
}
-static int gfx_v10_0_init_csb(struct amdgpu_device *adev)
+static void gfx_v10_0_init_csb(struct amdgpu_device *adev)
{
- int r;
-
- if (!adev->in_gpu_reset) {
- r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
- if (r)
- return r;
-
- r = amdgpu_bo_kmap(adev->gfx.rlc.clear_state_obj,
- (void **)&adev->gfx.rlc.cs_ptr);
- if (!r) {
- adev->gfx.rlc.funcs->get_csb_buffer(adev,
- adev->gfx.rlc.cs_ptr);
- amdgpu_bo_kunmap(adev->gfx.rlc.clear_state_obj);
- }
-
- amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
- if (r)
- return r;
- }
-
/* csib */
WREG32_SOC15(GC, 0, mmRLC_CSIB_ADDR_HI,
adev->gfx.rlc.clear_state_gpu_addr >> 32);
WREG32_SOC15(GC, 0, mmRLC_CSIB_ADDR_LO,
adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc);
WREG32_SOC15(GC, 0, mmRLC_CSIB_LENGTH, adev->gfx.rlc.clear_state_size);
-
- return 0;
}
-static int gfx_v10_0_init_pg(struct amdgpu_device *adev)
+static void gfx_v10_0_init_pg(struct amdgpu_device *adev)
{
int i;
- int r;
- r = gfx_v10_0_init_csb(adev);
- if (r)
- return r;
+ gfx_v10_0_init_csb(adev);
for (i = 0; i < adev->num_vmhubs; i++)
amdgpu_gmc_flush_gpu_tlb(adev, 0, i, 0);
/* TODO: init power gating */
- return 0;
+ return;
}
void gfx_v10_0_rlc_stop(struct amdgpu_device *adev)
@@ -1936,10 +1911,7 @@ static int gfx_v10_0_rlc_resume(struct amdgpu_device *adev)
r = gfx_v10_0_wait_for_rlc_autoload_complete(adev);
if (r)
return r;
-
- r = gfx_v10_0_init_pg(adev);
- if (r)
- return r;
+ gfx_v10_0_init_pg(adev);
/* enable RLC SRM */
gfx_v10_0_rlc_enable_srm(adev);
@@ -1965,10 +1937,7 @@ static int gfx_v10_0_rlc_resume(struct amdgpu_device *adev)
return r;
}
- r = gfx_v10_0_init_pg(adev);
- if (r)
- return r;
-
+ gfx_v10_0_init_pg(adev);
adev->gfx.rlc.funcs->start(adev);
if (adev->firmware.load_type == AMDGPU_FW_LOAD_RLC_BACKDOOR_AUTO) {
--
2.17.1
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