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From cd651b9c1930cc2c2c05ea02f788c390adf9e10a Mon Sep 17 00:00:00 2001
From: Eric Yang <Eric.Yang2@amd.com>
Date: Thu, 3 Oct 2019 15:06:01 -0400
Subject: [PATCH 4190/4736] drm/amd/display: add sanity check for clk table
from smu
[Why]
Handle the case where we don't get a valid table. Also fixes compiler
warning for variable potentially used before assignment.
[How]
If the entire table has no valid fclk, reject the table and use our own
hard code.
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
index fb8aa9436bf0..0e712df87109 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
@@ -546,6 +546,8 @@ void rn_clk_mgr_helper_populate_bw_params(struct clk_bw_params *bw_params, struc
{
int i, j = 0;
+ j = -1;
+
ASSERT(PP_SMU_NUM_FCLK_DPM_LEVELS <= MAX_NUM_DPM_LVL);
/* Find lowest DPM, FCLK is filled in reverse order*/
@@ -557,6 +559,12 @@ void rn_clk_mgr_helper_populate_bw_params(struct clk_bw_params *bw_params, struc
}
}
+ if (j == -1) {
+ /* clock table is all 0s, just use our own hardcode */
+ ASSERT(0);
+ return;
+ }
+
bw_params->clk_table.num_entries = j + 1;
for (i = 0; i < bw_params->clk_table.num_entries; i++, j--) {
--
2.17.1
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