From 8968f964b88aa9e59aa07885e016a8c4acf9216f Mon Sep 17 00:00:00 2001 From: Joseph Gravenor Date: Tue, 12 Nov 2019 15:36:57 -0500 Subject: [PATCH 4691/4736] drm/amd/display: update p-state latency for renoir when using lpddr4 [Why] DF team has produced more optimized latency numbers, for lpddr4 [How] change the p-state laency in the lpddr4 wm table to the new latency number Signed-off-by: Joseph Gravenor Reviewed-by: Tony Cheng Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c index 307c8540e36f..901e7035bf8e 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c @@ -562,7 +562,7 @@ struct wm_table lpddr4_wm_table = { { .wm_inst = WM_A, .wm_type = WM_TYPE_PSTATE_CHG, - .pstate_latency_us = 23.84, + .pstate_latency_us = 11.65333, .sr_exit_time_us = 12.5, .sr_enter_plus_exit_time_us = 17.0, .valid = true, @@ -570,7 +570,7 @@ struct wm_table lpddr4_wm_table = { { .wm_inst = WM_B, .wm_type = WM_TYPE_PSTATE_CHG, - .pstate_latency_us = 23.84, + .pstate_latency_us = 11.65333, .sr_exit_time_us = 12.5, .sr_enter_plus_exit_time_us = 17.0, .valid = true, @@ -578,7 +578,7 @@ struct wm_table lpddr4_wm_table = { { .wm_inst = WM_C, .wm_type = WM_TYPE_PSTATE_CHG, - .pstate_latency_us = 23.84, + .pstate_latency_us = 11.65333, .sr_exit_time_us = 12.5, .sr_enter_plus_exit_time_us = 17.0, .valid = true, @@ -586,7 +586,7 @@ struct wm_table lpddr4_wm_table = { { .wm_inst = WM_D, .wm_type = WM_TYPE_PSTATE_CHG, - .pstate_latency_us = 23.84, + .pstate_latency_us = 11.65333, .sr_exit_time_us = 12.5, .sr_enter_plus_exit_time_us = 17.0, .valid = true, -- 2.17.1