From 1572e7a9f2a2906fb27b0f79b0a64fbf2eaa9e01 Mon Sep 17 00:00:00 2001 From: Evan Quan Date: Thu, 14 Nov 2019 16:58:31 +0800 Subject: [PATCH 4472/4736] drm/amd/powerplay: correct fine grained dpm force level setting For fine grained dpm, there is only two levels supported. However to reflect correctly the current clock frequency, there is an intermediate level faked. Thus on forcing level setting, we need to treat level 2 correctly as level 1. Change-Id: I32f936636f27eb8d8d9002bedd701f2bb0d3060a Signed-off-by: Evan Quan Reviewed-by: Kevin Wang --- drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c index e0bc4f73dae9..8d5f33baaa77 100644 --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c @@ -886,6 +886,12 @@ static int navi10_force_clk_levels(struct smu_context *smu, case SMU_UCLK: case SMU_DCEFCLK: case SMU_FCLK: + /* There is only 2 levels for fine grained DPM */ + if (navi10_is_support_fine_grained_dpm(smu, clk_type)) { + soft_max_level = (soft_max_level >= 1 ? 1 : 0); + soft_min_level = (soft_min_level >= 1 ? 1 : 0); + } + ret = smu_get_dpm_freq_by_index(smu, clk_type, soft_min_level, &min_freq); if (ret) return size; -- 2.17.1