From 4bde2a3a41934d91fdbf726420c657fa1ce6e143 Mon Sep 17 00:00:00 2001 From: Philip Cox Date: Wed, 14 Aug 2019 09:09:19 -0400 Subject: [PATCH 4141/4736] drm/amdgpu: set debug register values at init time We need to initialize the SPI_GDBG_TRAP_MASK EXCP_EN and REPLACE to 0, along with SPI_GDBG_TRAP_DATA0, and SPI_GDBG_TRAP_DATA1 when we initialize the debug vmid. Change-Id: Ib3887397578d63c110a4247d6b61bf62111bc1c5 Signed-off-by: Philip Cox --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 16043b824f97..5e7a01c322ea 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -2273,6 +2273,11 @@ static void gfx_v9_0_init_compute_vmid(struct amdgpu_device *adev) data = REG_SET_FIELD(data, SPI_GDBG_TRAP_CONFIG, TRAP_EN, 1); WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_CONFIG), data); + + WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_DATA0), 0); + WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_DATA1), 0); + WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0); + } static void gfx_v9_0_init_gds_vmid(struct amdgpu_device *adev) -- 2.17.1