From db836f5b5a9251b68576c54fb11b9682235ea734 Mon Sep 17 00:00:00 2001 From: Evan Quan Date: Wed, 11 Sep 2019 19:39:34 +0800 Subject: [PATCH 3785/4256] drm/amd/powerplay: check SMU engine readiness before proceeding on S3 resume This is especially needed for non-psp loading way. Change-Id: I1e523168ed4892c34c8cbb66077c3f9288dd8006 Signed-off-by: Evan Quan Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 28 ++++++++++++++++++---- 1 file changed, 23 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c index a10387f51e21..bc11dff37a02 100644 --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c @@ -1213,11 +1213,10 @@ static int smu_free_memory_pool(struct smu_context *smu) return ret; } -static int smu_hw_init(void *handle) +static int smu_start_smc_engine(struct smu_context *smu) { - int ret; - struct amdgpu_device *adev = (struct amdgpu_device *)handle; - struct smu_context *smu = &adev->smu; + struct amdgpu_device *adev = smu->adev; + int ret = 0; if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) { if (adev->asic_type < CHIP_NAVI10) { @@ -1228,8 +1227,21 @@ static int smu_hw_init(void *handle) } ret = smu_check_fw_status(smu); + if (ret) + pr_err("SMC is not ready\n"); + + return ret; +} + +static int smu_hw_init(void *handle) +{ + int ret; + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + struct smu_context *smu = &adev->smu; + + ret = smu_start_smc_engine(smu); if (ret) { - pr_err("SMC firmware status is not correct\n"); + pr_err("SMU is not ready yet!\n"); return ret; } @@ -1381,6 +1393,12 @@ static int smu_resume(void *handle) mutex_lock(&smu->mutex); + ret = smu_start_smc_engine(smu); + if (ret) { + pr_err("SMU is not ready yet!\n"); + return ret; + } + ret = smu_smc_table_hw_init(smu, false); if (ret) goto failed; -- 2.17.1