From c7ba5637701bc3b4cc193988913c5528a80dc392 Mon Sep 17 00:00:00 2001 From: Hawking Zhang Date: Wed, 17 Jul 2019 21:49:53 +0800 Subject: [PATCH 3202/4256] drm/amdgpu: querry umc error count check umc error count in both ras querry function and ras interrupt handler Signed-off-by: Hawking Zhang Reviewed-by: Dennis Li --- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 11 ++++++++++- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 +++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c index 3be306bf1603..845e75f35b19 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c @@ -586,11 +586,19 @@ int amdgpu_ras_error_query(struct amdgpu_device *adev, struct ras_query_if *info) { struct ras_manager *obj = amdgpu_ras_find_obj(adev, &info->head); + struct ras_err_data err_data = {0, 0}; if (!obj) return -EINVAL; - /* TODO might read the register to read the count */ + switch (info->head.block) { + case AMDGPU_RAS_BLOCK__UMC: + if (adev->umc_funcs->query_ras_error_count) + adev->umc_funcs->query_ras_error_count(adev, &err_data); + break; + default: + break; + } info->ue_count = obj->err_data.ue_count; info->ce_count = obj->err_data.ce_count; @@ -984,6 +992,7 @@ static void amdgpu_ras_interrupt_handler(struct ras_manager *obj) struct ras_ih_data *data = &obj->ih_data; struct amdgpu_iv_entry entry; int ret; + struct ras_err_data err_data = {0, 0}; while (data->rptr != data->wptr) { rmb(); diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c index ac5a6bf477cb..fe22eb40d384 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c @@ -241,7 +241,10 @@ static int gmc_v9_0_ecc_interrupt_state(struct amdgpu_device *adev, static int gmc_v9_0_process_ras_data_cb(struct amdgpu_device *adev, struct amdgpu_iv_entry *entry) { + struct ras_err_data err_data = {0, 0}; kgd2kfd_set_sram_ecc_flag(adev->kfd.dev); + if (adev->umc_funcs->query_ras_error_count) + adev->umc_funcs->query_ras_error_count(adev, &err_data); amdgpu_ras_reset_gpu(adev, 0); return AMDGPU_RAS_UE; } -- 2.17.1