From 59c9286e5c117304416b81100d178f151f001dc1 Mon Sep 17 00:00:00 2001 From: Jun Lei Date: Fri, 17 May 2019 11:08:02 -0400 Subject: [PATCH 2554/2940] drm/amd/display: add support for forcing DCFCLK without affecting watermarks [why] useful for debugging [how] plumb a debug option in dc Signed-off-by: Jun Lei Reviewed-by: Tony Cheng Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher --- .../gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 4 ++++ drivers/gpu/drm/amd/display/dc/dc.h | 8 ++++++++ 2 files changed, 12 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c index de471ca87ed7..e3c1debf2597 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c @@ -172,6 +172,10 @@ void dcn2_update_clocks(struct clk_mgr *clk_mgr_base, pp_smu->set_voltage_by_freq(&pp_smu->pp_smu, PP_SMU_NV_PHYCLK, clk_mgr_base->clks.phyclk_khz / 1000); } + if (dc->debug.force_min_dcfclk_mhz > 0) + new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? + new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); + if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; if (pp_smu && pp_smu->set_hard_min_dcfclk_by_freq) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index eb8c918dbd3c..74e5fea6649f 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -372,6 +372,10 @@ struct dc_debug_options { #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT bool disable_fec; #endif + /* This forces a hard min on the DCFCLK requested to SMU/PP + * watermarks are not affected. + */ + unsigned int force_min_dcfclk_mhz; }; struct dc_debug_data { @@ -421,6 +425,10 @@ struct dc_bounding_box_overrides { int urgent_latency_ns; int percent_of_ideal_drambw; int dram_clock_change_latency_ns; + /* This forces a hard min on the DCFCLK we use + * for DML. Unlike the debug option for forcing + * DCFCLK, this override affects watermark calculations + */ int min_dcfclk_mhz; }; -- 2.17.1