From 2a5edb3cea01b30e7443c67b61694d41c6e2c0a0 Mon Sep 17 00:00:00 2001 From: Kevin Wang Date: Fri, 25 Jan 2019 15:10:13 +0800 Subject: [PATCH 1465/2940] drm/amd/powerplay: implement dpm enable functions of uvd & vce for smu add function of dpm enable uvd & vce for extern module use. Signed-off-by: Kevin Wang Reviewed-by: Huang Rui Acked-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 16 ++++++++++++++-- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 19 +++++++++++++++++++ .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 2 +- 3 files changed, 34 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c index a1faf3f8702e..b83981284a7c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c @@ -2347,7 +2347,13 @@ static void amdgpu_dpm_change_power_state_locked(struct amdgpu_device *adev) void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable) { - if (adev->powerplay.pp_funcs->set_powergating_by_smu) { + int ret = 0; + if (is_support_sw_smu(adev)) { + ret = smu_dpm_set_power_gate(&adev->smu, AMD_IP_BLOCK_TYPE_UVD, enable); + if (ret) + DRM_ERROR("[SW SMU]: dpm enable uvd failed, state = %s, ret = %d. \n", + enable ? "true" : "false", ret); + } else if (adev->powerplay.pp_funcs->set_powergating_by_smu) { /* enable/disable UVD */ mutex_lock(&adev->pm.mutex); amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_UVD, !enable); @@ -2368,7 +2374,13 @@ void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable) void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable) { - if (adev->powerplay.pp_funcs->set_powergating_by_smu) { + int ret = 0; + if (is_support_sw_smu(adev)) { + ret = smu_dpm_set_power_gate(&adev->smu, AMD_IP_BLOCK_TYPE_VCE, enable); + if (ret) + DRM_ERROR("[SW SMU]: dpm enable vce failed, state = %s, ret = %d. \n", + enable ? "true" : "false", ret); + } else if (adev->powerplay.pp_funcs->set_powergating_by_smu) { /* enable/disable VCE */ mutex_lock(&adev->pm.mutex); amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_VCE, !enable); diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c index f4328cf78d22..d6578be92196 100644 --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c @@ -29,6 +29,25 @@ #include "smu_v11_0.h" #include "atom.h" +int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type, + bool gate) +{ + int ret = 0; + + switch (block_type) { + case AMD_IP_BLOCK_TYPE_UVD: + ret = smu_dpm_set_uvd_enable(smu, gate); + break; + case AMD_IP_BLOCK_TYPE_VCE: + ret = smu_dpm_set_vce_enable(smu, gate); + break; + default: + break; + } + + return ret; +} + enum amd_pm_state_type smu_get_current_power_state(struct smu_context *smu) { /* not support power state */ diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h index 955b3508f1ce..53ca9530ed1f 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h @@ -698,5 +698,5 @@ extern int smu_display_configuration_change(struct smu_context *smu, const *display_config); extern int smu_get_current_clocks(struct smu_context *smu, struct amd_pp_clock_info *clocks); - +extern int smu_dpm_set_power_gate(struct smu_context *smu,uint32_t block_type, bool gate); #endif -- 2.17.1