From 08f4ba64765302b10cc4dc809ffe294b5f9d73a0 Mon Sep 17 00:00:00 2001 From: David Panariti Date: Tue, 22 May 2018 14:09:06 -0400 Subject: [PATCH 4636/5725] drm/amdgpu: Add interrupt SQ source struct to amdgpu_gfx struct v2. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit SQ can generate interrupts on EDC/ECC errors and this struct controls how the interrupt is handled. The guts are filled in in the gf_v_.c files. v2: Rebase. Signed-off-by: David Panariti Reviewed-by: Nicolai Hähnle --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 0571196..dbc5570 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -989,6 +989,7 @@ struct amdgpu_gfx { struct amdgpu_irq_src priv_reg_irq; struct amdgpu_irq_src priv_inst_irq; struct amdgpu_irq_src cp_ecc_error_irq; + struct amdgpu_irq_src sq_irq; /* gfx status */ uint32_t gfx_current_status; /* ce ram size*/ -- 2.7.4