From f9276c221a64b92acf7ab7d190cde2adb40bec9c Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Tue, 20 Mar 2018 13:24:30 -0500 Subject: [PATCH 4422/5725] drm/amdgpu/vg20: fallback to vbios table if gpu info fw is not available (v2) First try and fetch the gpu info firmware and then fall back to the vbios table if the gpu info firmware is not available. v2: warning fix (Alex) Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 16 ++++++++++++++-- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 0eee9f2..cfb66cc 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -1508,6 +1508,9 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev) goto out; } out: + /* fall back to vbios tables for vega20 */ + if (adev->asic_type == CHIP_VEGA20) + return 0; return err; } diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 5f812dd..e6616e7 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -27,6 +27,7 @@ #include "amdgpu_gfx.h" #include "soc15.h" #include "soc15d.h" +#include "amdgpu_atomfirmware.h" #include "gc/gc_9_0_offset.h" #include "gc/gc_9_0_sh_mask.h" @@ -1113,9 +1114,10 @@ static const struct amdgpu_gfx_funcs gfx_v9_0_gfx_funcs = { .select_me_pipe_q = &gfx_v9_0_select_me_pipe_q }; -static void gfx_v9_0_gpu_early_init(struct amdgpu_device *adev) +static int gfx_v9_0_gpu_early_init(struct amdgpu_device *adev) { u32 gb_addr_config; + int err; adev->gfx.funcs = &gfx_v9_0_gfx_funcs; @@ -1147,6 +1149,12 @@ static void gfx_v9_0_gpu_early_init(struct amdgpu_device *adev) gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG); gb_addr_config &= ~0xf3e777ff; gb_addr_config |= 0x22014042; + /* check vbios table if gpu info is not available */ + if (!adev->gfx.config.max_shader_engines) { + err = amdgpu_atomfirmware_get_gfx_info(adev); + if (err) + return err; + } break; case CHIP_RAVEN: adev->gfx.config.max_hw_contexts = 8; @@ -1197,6 +1205,8 @@ static void gfx_v9_0_gpu_early_init(struct amdgpu_device *adev) adev->gfx.config.gb_addr_config, GB_ADDR_CONFIG, PIPE_INTERLEAVE_SIZE)); + + return 0; } static int gfx_v9_0_ngg_create_buf(struct amdgpu_device *adev, @@ -1558,7 +1568,9 @@ static int gfx_v9_0_sw_init(void *handle) adev->gfx.ce_ram_size = 0x8000; - gfx_v9_0_gpu_early_init(adev); + r = gfx_v9_0_gpu_early_init(adev); + if (r) + return r; r = gfx_v9_0_ngg_init(adev); if (r) -- 2.7.4