From fc3c92e79b51f29a73ae76927c95e90cb5fb5698 Mon Sep 17 00:00:00 2001 From: Shaoyun Liu Date: Wed, 21 Feb 2018 15:37:28 -0500 Subject: [PATCH 3708/4131] drm/amdgpu: Set correct information of cu For GFX7 and GFX8, the cu info is global and static. For GFX9, driver will not override them and will rely on firmware to provide the correct information Change-Id: I6b0ffc635aa6e84cd2a068a8d867aaabd1853374 Signed-off-by: Shaoyun Liu Signed-off-by: Kalyan Alle --- drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 17 ++++------------- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 21 ++++----------------- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 13 ------------- 3 files changed, 8 insertions(+), 43 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c index e203049..eb819f9 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c @@ -5250,19 +5250,10 @@ static void gfx_v7_0_get_cu_info(struct amdgpu_device *adev) cu_info->number = active_cu_number; cu_info->ao_cu_mask = ao_cu_mask; cu_info->simd_per_cu = NUM_SIMD_PER_CU; - switch (adev->asic_type) { - case CHIP_KAVERI: - case CHIP_HAWAII: - cu_info->max_waves_per_simd = 10; - cu_info->max_scratch_slots_per_cu = 32; - cu_info->wave_front_size = 64; - cu_info->lds_size = 64; - break; - default: - dev_warn(adev->dev, "CU info asic_type [0x%x] not supported\n", - adev->asic_type); - break; - } + cu_info->max_waves_per_simd = 10; + cu_info->max_scratch_slots_per_cu = 32; + cu_info->wave_front_size = 64; + cu_info->lds_size = 64; } const struct amdgpu_ip_block_version gfx_v7_0_ip_block = diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index af7b01e..6f29197 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c @@ -7111,23 +7111,10 @@ static void gfx_v8_0_get_cu_info(struct amdgpu_device *adev) cu_info->number = active_cu_number; cu_info->ao_cu_mask = ao_cu_mask; cu_info->simd_per_cu = NUM_SIMD_PER_CU; - switch (adev->asic_type) { - case CHIP_CARRIZO: - case CHIP_TONGA: - case CHIP_FIJI: - case CHIP_POLARIS10: - case CHIP_POLARIS11: - cu_info->max_waves_per_simd = 10; - cu_info->max_scratch_slots_per_cu = 32; - cu_info->wave_front_size = 64; - cu_info->lds_size = 64; - break; - default: - dev_warn(adev->dev, "CU info asic_type [0x%x] not supported\n", - adev->asic_type); - } - - + cu_info->max_waves_per_simd = 10; + cu_info->max_scratch_slots_per_cu = 32; + cu_info->wave_front_size = 64; + cu_info->lds_size = 64; } const struct amdgpu_ip_block_version gfx_v8_0_ip_block = diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 50a708f..3e28398 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -4575,19 +4575,6 @@ static int gfx_v9_0_get_cu_info(struct amdgpu_device *adev, cu_info->simd_per_cu = NUM_SIMD_PER_CU; cu_info->simd_per_cu = NUM_SIMD_PER_CU; - switch (adev->asic_type) { - case CHIP_VEGA10: /* TODO: check if any of this changed */ - case CHIP_RAVEN: - cu_info->max_waves_per_simd = 10; - cu_info->max_scratch_slots_per_cu = 32; - cu_info->wave_front_size = 64; - cu_info->lds_size = 64; - break; - default: - dev_warn(adev->dev, "CU info asic_type [0x%x] not supported\n", - adev->asic_type); - } - return 0; } -- 2.7.4