From 914538acb3fdf4f1c5fd06ec99c7dd2640abb5f4 Mon Sep 17 00:00:00 2001 From: Rex Zhu Date: Wed, 7 Mar 2018 10:40:27 +0800 Subject: [PATCH 3697/4131] drm/amd/pp: Fix "Add auto power profilng switch based on workloads" 1. fix typo "<" should be "<<" 2. fix code style 3. fix uninitialized point *workload Change-Id: I44ceba0025ddacdcc3dfd04ba5e73066e8931e93 Reviewed-by: Alex Deucher Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 14 +++++++------- drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 10 +++++----- drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c | 2 +- drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 2 +- drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 2 +- 5 files changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c index e4d513d..4550f09 100644 --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c @@ -1081,7 +1081,7 @@ static int pp_dpm_switch_power_profile(void *handle, { struct pp_hwmgr *hwmgr; struct pp_instance *pp_handle = (struct pp_instance *)handle; - long *workload; + long workload; uint32_t index; if (pp_check(pp_handle)) @@ -1100,19 +1100,19 @@ static int pp_dpm_switch_power_profile(void *handle, mutex_lock(&pp_handle->pp_lock); if (!en) { - hwmgr->workload_mask &= ~(1 < hwmgr->workload_prority[type]); + hwmgr->workload_mask &= ~(1 << hwmgr->workload_prority[type]); index = fls(hwmgr->workload_mask); - index = index > 0 && index <= Workload_Policy_Max? index - 1 : 0; - *workload = hwmgr->workload_setting[index]; + index = index > 0 && index <= Workload_Policy_Max ? index - 1 : 0; + workload = hwmgr->workload_setting[index]; } else { - hwmgr->workload_mask |= (1 < hwmgr->workload_prority[type]); + hwmgr->workload_mask |= (1 << hwmgr->workload_prority[type]); index = fls(hwmgr->workload_mask); index = index <= Workload_Policy_Max ? index - 1 : 0; - *workload = hwmgr->workload_setting[index]; + workload = hwmgr->workload_setting[index]; } if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) - hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, workload, 0); + hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, &workload, 0); mutex_unlock(&pp_handle->pp_lock); return 0; diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c index aa83114..af1b22d 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c @@ -133,11 +133,11 @@ static void hwmgr_init_workload_prority(struct pp_hwmgr *hwmgr) hwmgr->workload_prority[PP_SMC_POWER_PROFILE_VR] = 3; hwmgr->workload_prority[PP_SMC_POWER_PROFILE_COMPUTE] = 4; - hwmgr->workload_setting[0]= PP_SMC_POWER_PROFILE_POWERSAVING; - hwmgr->workload_setting[1]= PP_SMC_POWER_PROFILE_VIDEO; - hwmgr->workload_setting[2]= PP_SMC_POWER_PROFILE_FULLSCREEN3D; - hwmgr->workload_setting[3]= PP_SMC_POWER_PROFILE_VR; - hwmgr->workload_setting[4]= PP_SMC_POWER_PROFILE_COMPUTE; + hwmgr->workload_setting[0] = PP_SMC_POWER_PROFILE_POWERSAVING; + hwmgr->workload_setting[1] = PP_SMC_POWER_PROFILE_VIDEO; + hwmgr->workload_setting[2] = PP_SMC_POWER_PROFILE_FULLSCREEN3D; + hwmgr->workload_setting[3] = PP_SMC_POWER_PROFILE_VR; + hwmgr->workload_setting[4] = PP_SMC_POWER_PROFILE_COMPUTE; } int hwmgr_early_init(struct pp_instance *handle) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c b/drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c index 51439a1..d0ef8f9 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c @@ -251,7 +251,7 @@ int psm_adjust_power_state_dynamic(struct pp_hwmgr *hwmgr, bool skip, if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { index = fls(hwmgr->workload_mask); - index = index > 0 && index <= Workload_Policy_Max? index - 1 : 0; + index = index > 0 && index <= Workload_Policy_Max ? index - 1 : 0; workload = hwmgr->workload_setting[index]; if (hwmgr->power_profile_mode != workload && hwmgr->hwmgr_func->set_power_profile_mode) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c index 74cd214..cc1db96 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c @@ -1510,7 +1510,7 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr) data->current_profile_setting.mclk_up_hyst = 0; data->current_profile_setting.mclk_down_hyst = 100; data->current_profile_setting.mclk_activity = SMU7_MCLK_TARGETACTIVITY_DFLT; - hwmgr->workload_mask = 1 < hwmgr->workload_prority[PP_SMC_POWER_PROFILE_FULLSCREEN3D]; + hwmgr->workload_mask = 1 << hwmgr->workload_prority[PP_SMC_POWER_PROFILE_FULLSCREEN3D]; hwmgr->power_profile_mode = PP_SMC_POWER_PROFILE_FULLSCREEN3D; hwmgr->default_power_profile_mode = PP_SMC_POWER_PROFILE_FULLSCREEN3D; diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c index c9c27b6..a8c3c45 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c @@ -766,7 +766,7 @@ static int vega10_hwmgr_backend_init(struct pp_hwmgr *hwmgr) hwmgr->backend = data; - hwmgr->workload_mask = 1 < hwmgr->workload_prority[PP_SMC_POWER_PROFILE_VIDEO]; + hwmgr->workload_mask = 1 << hwmgr->workload_prority[PP_SMC_POWER_PROFILE_VIDEO]; hwmgr->power_profile_mode = PP_SMC_POWER_PROFILE_VIDEO; hwmgr->default_power_profile_mode = PP_SMC_POWER_PROFILE_VIDEO; -- 2.7.4