From 92bf5102c1015e638da74c15577260864a587e09 Mon Sep 17 00:00:00 2001 From: Yue Hin Lau Date: Thu, 9 Nov 2017 17:03:00 -0500 Subject: [PATCH 2775/4131] drm/amd/display: update output csc matrix values Signed-off-by: Yue Hin Lau Reviewed-by: Tony Cheng Acked-by: Harry Wentland Signed-off-by: Alex Deucher --- .../gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c | 33 ++++++++++------------ .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 5 +--- 2 files changed, 16 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c index b554198..b601a00 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c @@ -123,29 +123,26 @@ struct output_csc_matrix { }; static const struct output_csc_matrix output_csc_matrix[] = { - { COLOR_SPACE_SRGB, + { COLOR_SPACE_SRGB, { 0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} }, - { COLOR_SPACE_SRGB_LIMITED, - { 0x1B60, 0, 0, 0x200, 0, 0x1B60, 0, 0x200, 0, 0, 0x1B60, 0x200} }, - { COLOR_SPACE_YCBCR601, - { 0xE00, 0xF447, 0xFDB9, 0x1000, 0x82F, 0x1012, 0x31F, 0x200, 0xFB47, - 0xF6B9, 0xE00, 0x1000} }, - { COLOR_SPACE_YCBCR709, - { 0xE00, 0xF349, 0xFEB7, 0x1000, 0x5D2, 0x1394, 0x1FA, - 0x200, 0xFCCB, 0xF535, 0xE00, 0x1000} }, - - /* TODO: correct values below */ - { COLOR_SPACE_YCBCR601_LIMITED, + { COLOR_SPACE_SRGB_LIMITED, + { 0x1B67, 0, 0, 0x201, 0, 0x1B67, 0, 0x201, 0, 0, 0x1B67, 0x201} }, + { COLOR_SPACE_YCBCR601, + { 0xE04, 0xF444, 0xFDB9, 0x1004, 0x831, 0x1016, 0x320, 0x201, 0xFB45, + 0xF6B7, 0xE04, 0x1004} }, + { COLOR_SPACE_YCBCR709, + { 0xE04, 0xF345, 0xFEB7, 0x1004, 0x5D3, 0x1399, 0x1FA, + 0x201, 0xFCCA, 0xF533, 0xE04, 0x1004} }, + + /* TODO: correct values below */ + { COLOR_SPACE_YCBCR601_LIMITED, { 0xE00, 0xF447, 0xFDB9, 0x1000, 0x991, - 0x12C9, 0x3A6, 0x200, 0xFB47, 0xF6B9, 0xE00, 0x1000} }, - { COLOR_SPACE_YCBCR709_LIMITED, + 0x12C9, 0x3A6, 0x200, 0xFB47, 0xF6B9, 0xE00, 0x1000} }, + { COLOR_SPACE_YCBCR709_LIMITED, { 0xE00, 0xF349, 0xFEB7, 0x1000, 0x6CE, 0x16E3, - 0x24F, 0x200, 0xFCCB, 0xF535, 0xE00, 0x1000} }, - { COLOR_SPACE_UNKNOWN, - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} } + 0x24F, 0x200, 0xFCCB, 0xF535, 0xE00, 0x1000} }, }; - static void program_gamut_remap( struct dcn10_dpp *dpp, const uint16_t *regval, diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index fa9d3e9..ab79cf2 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -1686,7 +1686,6 @@ static void program_csc_matrix(struct pipe_ctx *pipe_ctx, } } -//program ocsc matrix for dcn 2 static void set_mpc_output_csc(struct dc *dc, struct pipe_ctx *pipe_ctx, enum dc_color_space colorspace, @@ -1710,9 +1709,7 @@ static void set_mpc_output_csc(struct dc *dc, opp_id, &tbl_entry, ocsc_mode); - } - - else { + } else { if (mpc->funcs->set_ocsc_default != NULL) mpc->funcs->set_ocsc_default(mpc, opp_id, -- 2.7.4