From 3de08d2f035740575902e4c4e51e874233d6cdb6 Mon Sep 17 00:00:00 2001 From: Rex Zhu Date: Sat, 30 Sep 2017 10:44:38 +0800 Subject: [PATCH 1945/4131] drm/amd/powerplay: fix ret checks in amd_powerplay.c regresstion issue caused by commit e37a7b4088da ("drm/amd/powerplay: tidy up ret checks in amd_powerplay.c") Change-Id: Ied13b5288897f109cc8059868c44d04fd3eb6f6a reviewed-by: Evan Quan Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 74 +++++++++++++-------------- 1 file changed, 37 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c index 21936c0..ed18a2c 100644 --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c @@ -230,7 +230,7 @@ static int pp_set_powergating_state(void *handle, ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -378,7 +378,7 @@ static int pp_dpm_force_performance_level(void *handle, ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -396,7 +396,7 @@ static int pp_dpm_force_performance_level(void *handle, hwmgr->request_dpm_level = level; hwmgr_handle_task(pp_handle, AMD_PP_TASK_READJUST_POWER_STATE, NULL, NULL); ret = hwmgr->hwmgr_func->force_dpm_level(hwmgr, level); - if (!ret) + if (ret) hwmgr->dpm_level = hwmgr->request_dpm_level; mutex_unlock(&pp_handle->pp_lock); @@ -413,7 +413,7 @@ static enum amd_dpm_forced_level pp_dpm_get_performance_level( ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -432,7 +432,7 @@ static uint32_t pp_dpm_get_sclk(void *handle, bool low) ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -456,7 +456,7 @@ static uint32_t pp_dpm_get_mclk(void *handle, bool low) ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -479,7 +479,7 @@ static void pp_dpm_powergate_vce(void *handle, bool gate) ret = pp_check(pp_handle); - if (!ret) + if (ret) return; hwmgr = pp_handle->hwmgr; @@ -501,7 +501,7 @@ static void pp_dpm_powergate_uvd(void *handle, bool gate) ret = pp_check(pp_handle); - if (!ret) + if (ret) return; hwmgr = pp_handle->hwmgr; @@ -523,7 +523,7 @@ static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id, ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; mutex_lock(&pp_handle->pp_lock); @@ -543,7 +543,7 @@ static enum amd_pm_state_type pp_dpm_get_current_power_state(void *handle) ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -585,7 +585,7 @@ static void pp_dpm_set_fan_control_mode(void *handle, uint32_t mode) ret = pp_check(pp_handle); - if (!ret) + if (ret) return; hwmgr = pp_handle->hwmgr; @@ -608,7 +608,7 @@ static uint32_t pp_dpm_get_fan_control_mode(void *handle) ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -631,7 +631,7 @@ static int pp_dpm_set_fan_speed_percent(void *handle, uint32_t percent) ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -654,7 +654,7 @@ static int pp_dpm_get_fan_speed_percent(void *handle, uint32_t *speed) ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -678,7 +678,7 @@ static int pp_dpm_get_fan_speed_rpm(void *handle, uint32_t *rpm) ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -700,7 +700,7 @@ static int pp_dpm_get_temperature(void *handle) ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -725,7 +725,7 @@ static int pp_dpm_get_pp_num_states(void *handle, ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -770,7 +770,7 @@ static int pp_dpm_get_pp_table(void *handle, char **table) ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -813,7 +813,7 @@ static int pp_dpm_set_pp_table(void *handle, const char *buf, size_t size) ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -855,7 +855,7 @@ static int pp_dpm_force_clock_level(void *handle, ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -879,7 +879,7 @@ static int pp_dpm_print_clock_levels(void *handle, ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -902,7 +902,7 @@ static int pp_dpm_get_sclk_od(void *handle) ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -925,7 +925,7 @@ static int pp_dpm_set_sclk_od(void *handle, uint32_t value) ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -949,7 +949,7 @@ static int pp_dpm_get_mclk_od(void *handle) ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -972,7 +972,7 @@ static int pp_dpm_set_mclk_od(void *handle, uint32_t value) ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -996,7 +996,7 @@ static int pp_dpm_read_sensor(void *handle, int idx, ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -1022,7 +1022,7 @@ pp_dpm_get_vce_clock_state(void *handle, unsigned idx) ret = pp_check(pp_handle); - if (!ret) + if (ret) return NULL; hwmgr = pp_handle->hwmgr; @@ -1172,7 +1172,7 @@ static int amd_powerplay_display_configuration_change(void *handle, ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -1191,7 +1191,7 @@ static int amd_powerplay_get_display_power_level(void *handle, ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -1216,7 +1216,7 @@ static int amd_powerplay_get_current_clocks(void *handle, ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -1233,7 +1233,7 @@ static int amd_powerplay_get_current_clocks(void *handle, ret = phm_get_clock_info(hwmgr, &hwmgr->current_ps->hardware, &hw_clocks, PHM_PerformanceLevelDesignation_Activity); - if (!ret) { + if (ret) { pr_info("Error in phm_get_clock_info \n"); mutex_unlock(&pp_handle->pp_lock); return -EINVAL; @@ -1267,7 +1267,7 @@ static int amd_powerplay_get_clock_by_type(void *handle, enum amd_pp_clock_type ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; @@ -1290,7 +1290,7 @@ static int amd_powerplay_get_clock_by_type_with_latency(void *handle, int ret = 0; ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; if (!clocks) @@ -1312,7 +1312,7 @@ static int amd_powerplay_get_clock_by_type_with_voltage(void *handle, int ret = 0; ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; if (!clocks) @@ -1336,7 +1336,7 @@ static int amd_powerplay_set_watermarks_for_clocks_ranges(void *handle, int ret = 0; ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; if (!wm_with_clock_ranges) @@ -1360,7 +1360,7 @@ static int amd_powerplay_display_clock_voltage_request(void *handle, int ret = 0; ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; if (!clock) @@ -1384,7 +1384,7 @@ static int amd_powerplay_get_display_mode_validation_clocks(void *handle, ret = pp_check(pp_handle); - if (!ret) + if (ret) return ret; hwmgr = pp_handle->hwmgr; -- 2.7.4