From c21584139dd4f709d7c8c5f5cc5086e6a6e3e232 Mon Sep 17 00:00:00 2001 From: Yong Zhao Date: Wed, 25 May 2016 16:33:18 -0400 Subject: [PATCH 1140/4131] drm/amdkfd: Rename function pointers to avoid confusion There are two register_process() function pointers, causing unnecessary confusion when reading the code. The one changed was actually updating qpd. This commit reflects that. The similar reason for initialize() function pointer. Change-Id: I3d94ca26606c902d9c5149750c58288d2236abcf Signed-off-by: Yong Zhao --- .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 18 ++++++------- .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.h | 16 +++++++----- .../drm/amd/amdkfd/kfd_device_queue_manager_cik.c | 30 ++++++++++++---------- .../drm/amd/amdkfd/kfd_device_queue_manager_vi.c | 29 +++++++++++---------- 4 files changed, 49 insertions(+), 44 deletions(-) diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c index c973a3a..5fb3c1e 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c @@ -589,7 +589,7 @@ static int register_process_nocpsch(struct device_queue_manager *dqm, dqm->dev->kfd2kgd->get_process_page_dir(pdd->vm); pr_debug("Retrieved PD address == 0x%08u\n", qpd->page_table_base); - retval = dqm->ops_asic_specific.register_process(dqm, qpd); + retval = dqm->asic_ops.update_qpd(dqm, qpd); dqm->processes_count++; @@ -768,7 +768,7 @@ static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm, pr_debug(" sdma queue id: %d\n", q->properties.sdma_queue_id); pr_debug(" sdma engine id: %d\n", q->properties.sdma_engine_id); - dqm->ops_asic_specific.init_sdma_vm(dqm, q, qpd); + dqm->asic_ops.init_sdma_vm(dqm, q, qpd); retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj, &q->gart_mqd_addr, &q->properties); if (retval != 0) { @@ -850,7 +850,7 @@ static int initialize_cpsch(struct device_queue_manager *dqm) dqm->sdma_queue_count = 0; dqm->active_runlist = false; dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1; - retval = dqm->ops_asic_specific.initialize(dqm); + retval = dqm->asic_ops.init_cpsch(dqm); if (retval != 0) goto fail_init_pipelines; @@ -1036,7 +1036,7 @@ static int create_queue_cpsch(struct device_queue_manager *dqm, struct queue *q, q->properties.queue_percent > 0 && q->properties.queue_address != 0); - dqm->ops_asic_specific.init_sdma_vm(dqm, q, qpd); + dqm->asic_ops.init_sdma_vm(dqm, q, qpd); q->properties.tba_addr = qpd->tba_addr; q->properties.tma_addr = qpd->tma_addr; @@ -1297,7 +1297,7 @@ static bool set_cache_memory_policy(struct device_queue_manager *dqm, qpd->sh_mem_ape1_limit = limit >> 16; } - retval = dqm->ops_asic_specific.set_cache_memory_policy( + retval = dqm->asic_ops.set_cache_memory_policy( dqm, qpd, default_policy, @@ -1526,20 +1526,20 @@ struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev) switch (dev->device_info->asic_family) { case CHIP_CARRIZO: - device_queue_manager_init_vi(&dqm->ops_asic_specific); + device_queue_manager_init_vi(&dqm->asic_ops); break; case CHIP_KAVERI: - device_queue_manager_init_cik(&dqm->ops_asic_specific); + device_queue_manager_init_cik(&dqm->asic_ops); break; case CHIP_HAWAII: - device_queue_manager_init_cik_hawaii(&dqm->ops_asic_specific); + device_queue_manager_init_cik_hawaii(&dqm->asic_ops); break; case CHIP_TONGA: case CHIP_FIJI: - device_queue_manager_init_vi_tonga(&dqm->ops_asic_specific); + device_queue_manager_init_vi_tonga(&dqm->asic_ops); break; } diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h index 97a739a..65e4c51c 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h @@ -141,9 +141,9 @@ struct device_queue_manager_ops { }; struct device_queue_manager_asic_ops { - int (*register_process)(struct device_queue_manager *dqm, + int (*update_qpd)(struct device_queue_manager *dqm, struct qcm_process_device *qpd); - int (*initialize)(struct device_queue_manager *dqm); + int (*init_cpsch)(struct device_queue_manager *dqm); bool (*set_cache_memory_policy)(struct device_queue_manager *dqm, struct qcm_process_device *qpd, enum cache_policy default_policy, @@ -169,7 +169,7 @@ struct device_queue_manager_asic_ops { struct device_queue_manager { struct device_queue_manager_ops ops; - struct device_queue_manager_asic_ops ops_asic_specific; + struct device_queue_manager_asic_ops asic_ops; struct mqd_manager *mqds[KFD_MQD_TYPE_MAX]; struct packet_manager packets; @@ -193,12 +193,14 @@ struct device_queue_manager { int sched_policy; }; -void device_queue_manager_init_cik(struct device_queue_manager_asic_ops *ops); +void device_queue_manager_init_cik( + struct device_queue_manager_asic_ops *asic_ops); void device_queue_manager_init_cik_hawaii( - struct device_queue_manager_asic_ops *ops); -void device_queue_manager_init_vi(struct device_queue_manager_asic_ops *ops); + struct device_queue_manager_asic_ops *asic_ops); +void device_queue_manager_init_vi( + struct device_queue_manager_asic_ops *asic_ops); void device_queue_manager_init_vi_tonga( - struct device_queue_manager_asic_ops *ops); + struct device_queue_manager_asic_ops *asic_ops); void program_sh_mem_settings(struct device_queue_manager *dqm, struct qcm_process_device *qpd); unsigned int get_queues_num(struct device_queue_manager *dqm); diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c index 78d3c6d..341adfa 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c @@ -32,9 +32,9 @@ static bool set_cache_memory_policy_cik(struct device_queue_manager *dqm, enum cache_policy alternate_policy, void __user *alternate_aperture_base, uint64_t alternate_aperture_size); -static int register_process_cik(struct device_queue_manager *dqm, +static int update_qpd_cik(struct device_queue_manager *dqm, struct qcm_process_device *qpd); -static int register_process_cik_hawaii(struct device_queue_manager *dqm, +static int update_qpd_cik_hawaii(struct device_queue_manager *dqm, struct qcm_process_device *qpd); static int initialize_cpsch_cik(struct device_queue_manager *dqm); static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q, @@ -43,20 +43,22 @@ static void init_sdma_vm_hawaii(struct device_queue_manager *dqm, struct queue *q, struct qcm_process_device *qpd); -void device_queue_manager_init_cik(struct device_queue_manager_asic_ops *ops) +void device_queue_manager_init_cik( + struct device_queue_manager_asic_ops *asic_ops) { - ops->set_cache_memory_policy = set_cache_memory_policy_cik; - ops->register_process = register_process_cik; - ops->initialize = initialize_cpsch_cik; - ops->init_sdma_vm = init_sdma_vm; + asic_ops->set_cache_memory_policy = set_cache_memory_policy_cik; + asic_ops->update_qpd = update_qpd_cik; + asic_ops->init_cpsch = initialize_cpsch_cik; + asic_ops->init_sdma_vm = init_sdma_vm; } -void device_queue_manager_init_cik_hawaii(struct device_queue_manager_asic_ops *ops) +void device_queue_manager_init_cik_hawaii( + struct device_queue_manager_asic_ops *asic_ops) { - ops->set_cache_memory_policy = set_cache_memory_policy_cik; - ops->register_process = register_process_cik_hawaii; - ops->initialize = initialize_cpsch_cik; - ops->init_sdma_vm = init_sdma_vm_hawaii; + asic_ops->set_cache_memory_policy = set_cache_memory_policy_cik; + asic_ops->update_qpd = update_qpd_cik_hawaii; + asic_ops->init_cpsch = initialize_cpsch_cik; + asic_ops->init_sdma_vm = init_sdma_vm_hawaii; } static uint32_t compute_sh_mem_bases_64bit(unsigned int top_address_nybble) @@ -112,7 +114,7 @@ static bool set_cache_memory_policy_cik(struct device_queue_manager *dqm, return true; } -static int register_process_cik(struct device_queue_manager *dqm, +static int update_qpd_cik(struct device_queue_manager *dqm, struct qcm_process_device *qpd) { struct kfd_process_device *pdd; @@ -148,7 +150,7 @@ static int register_process_cik(struct device_queue_manager *dqm, return 0; } -static int register_process_cik_hawaii(struct device_queue_manager *dqm, +static int update_qpd_cik_hawaii(struct device_queue_manager *dqm, struct qcm_process_device *qpd) { struct kfd_process_device *pdd; diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c index 981d4c9..abd71c6 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c @@ -33,7 +33,7 @@ static bool set_cache_memory_policy_vi(struct device_queue_manager *dqm, enum cache_policy alternate_policy, void __user *alternate_aperture_base, uint64_t alternate_aperture_size); -static int register_process_vi(struct device_queue_manager *dqm, +static int update_qpd_vi(struct device_queue_manager *dqm, struct qcm_process_device *qpd); static int initialize_cpsch_vi(struct device_queue_manager *dqm); static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q, @@ -48,28 +48,29 @@ static bool set_cache_memory_policy_vi_tonga(struct device_queue_manager *dqm, enum cache_policy alternate_policy, void __user *alternate_aperture_base, uint64_t alternate_aperture_size); -static int register_process_vi_tonga(struct device_queue_manager *dqm, +static int update_qpd_vi_tonga(struct device_queue_manager *dqm, struct qcm_process_device *qpd); static void init_sdma_vm_tonga(struct device_queue_manager *dqm, struct queue *q, struct qcm_process_device *qpd); void device_queue_manager_init_vi_tonga( - struct device_queue_manager_asic_ops *ops) + struct device_queue_manager_asic_ops *asic_ops) { - ops->set_cache_memory_policy = set_cache_memory_policy_vi_tonga; - ops->register_process = register_process_vi_tonga; - ops->initialize = initialize_cpsch_vi; - ops->init_sdma_vm = init_sdma_vm_tonga; + asic_ops->set_cache_memory_policy = set_cache_memory_policy_vi_tonga; + asic_ops->update_qpd = update_qpd_vi_tonga; + asic_ops->init_cpsch = initialize_cpsch_vi; + asic_ops->init_sdma_vm = init_sdma_vm_tonga; } -void device_queue_manager_init_vi(struct device_queue_manager_asic_ops *ops) +void device_queue_manager_init_vi( + struct device_queue_manager_asic_ops *asic_ops) { - ops->set_cache_memory_policy = set_cache_memory_policy_vi; - ops->register_process = register_process_vi; - ops->initialize = initialize_cpsch_vi; - ops->init_sdma_vm = init_sdma_vm; + asic_ops->set_cache_memory_policy = set_cache_memory_policy_vi; + asic_ops->update_qpd = update_qpd_vi; + asic_ops->init_cpsch = initialize_cpsch_vi; + asic_ops->init_sdma_vm = init_sdma_vm; } static uint32_t compute_sh_mem_bases_64bit(unsigned int top_address_nybble) @@ -156,7 +157,7 @@ static bool set_cache_memory_policy_vi_tonga(struct device_queue_manager *dqm, return true; } -static int register_process_vi(struct device_queue_manager *dqm, +static int update_qpd_vi(struct device_queue_manager *dqm, struct qcm_process_device *qpd) { struct kfd_process_device *pdd; @@ -199,7 +200,7 @@ static int register_process_vi(struct device_queue_manager *dqm, return 0; } -static int register_process_vi_tonga(struct device_queue_manager *dqm, +static int update_qpd_vi_tonga(struct device_queue_manager *dqm, struct qcm_process_device *qpd) { struct kfd_process_device *pdd; -- 2.7.4