From fad1c1b2dbf6c47b05b945a3ad75ba8c19c42953 Mon Sep 17 00:00:00 2001 From: Yongqiang Sun Date: Tue, 22 Aug 2017 15:03:06 -0400 Subject: [PATCH 1016/4131] drm/amd/display: Remove mpc from bios left over, keep double buffer disabled. Change-Id: Ife3ff042c9f70a6e8c08f0e5a395117de04eed14 Signed-off-by: Yongqiang Sun Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c | 10 +++++++++- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c | 3 --- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c index ce408cc..082b39a 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c @@ -127,10 +127,18 @@ static void mpc10_mpcc_remove( for (z_idx = 0; z_idx < opp->mpc_tree.num_pipes; z_idx++) if (opp->mpc_tree.dpp[z_idx] == dpp_id) break; + if (z_idx == opp->mpc_tree.num_pipes) { - ASSERT(0); + /* In case of resume from S3/S4, remove mpcc from bios left over */ + REG_SET(MPCC_OPP_ID[dpp_id], 0, + MPCC_OPP_ID, 0xf); + REG_SET(MPCC_TOP_SEL[dpp_id], 0, + MPCC_TOP_SEL, 0xf); + REG_SET(MPCC_BOT_SEL[dpp_id], 0, + MPCC_BOT_SEL, 0xf); return; } + mpcc_id = opp->mpc_tree.mpcc[z_idx]; REG_SET(MPCC_OPP_ID[mpcc_id], 0, diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c index cc58f43..6a5f268 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c @@ -289,9 +289,6 @@ static void tgn10_unblank_crtc(struct timing_generator *tg) { struct dcn10_timing_generator *tgn10 = DCN10TG_FROM_TG(tg); - REG_UPDATE(OTG_DOUBLE_BUFFER_CONTROL, - OTG_BLANK_DATA_DOUBLE_BUFFER_EN, 1); - REG_UPDATE_2(OTG_BLANK_CONTROL, OTG_BLANK_DATA_EN, 0, OTG_BLANK_DE_MODE, 0); -- 2.7.4