From 1f4fff13e5589d772b2ad2dce7aebeb1c1ce61f1 Mon Sep 17 00:00:00 2001 From: Chaudhary Amit Kumar Date: Wed, 17 Oct 2018 16:43:28 +0530 Subject: [PATCH 0813/4131] drm/amd/amdgpu: [DGMA] no need to reserve Gart table now for DGMA only gtt size reservation is enough Change-Id: I060da4249d15860e5efbe86076eaebbd0902de5d Reviewed-by: Hawking Zhang Reviewed-by: Flora Cui Signed-off-by: Roger He Signed-off-by: Kalyan Alle Signed-off-by: Chaudhary Amit Kumar --- drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 25 ++++--------------------- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 8 ++------ drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 7 ++----- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 12 +++++------- include/uapi/drm/amdgpu_drm.h | 12 ++++++++++-- 5 files changed, 23 insertions(+), 41 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c index a99545c..c6e5ecd 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c @@ -413,8 +413,7 @@ int amdgpu_gem_dgma_ioctl(struct drm_device *dev, void *data, struct drm_gem_object *gobj; struct amdgpu_bo *abo; dma_addr_t *dma_addr; - uint32_t handle, flags; - uint64_t offset; + uint32_t handle; int i, r = 0; switch (args->op) { @@ -427,31 +426,15 @@ int amdgpu_gem_dgma_ioctl(struct drm_device *dev, void *data, return r; abo = gem_to_amdgpu_bo(gobj); - r = amdgpu_bo_reserve(abo, true); - if (unlikely(r)) - goto release_object; - dma_addr = kmalloc_array(abo->tbo.num_pages, sizeof(dma_addr_t), GFP_KERNEL); - if (unlikely(dma_addr == NULL)) { - amdgpu_bo_unreserve(abo); + if (unlikely(dma_addr == NULL)) goto release_object; - } + for (i = 0; i < abo->tbo.num_pages; i++) dma_addr[i] = args->addr + i * PAGE_SIZE; - - flags = amdgpu_ttm_tt_pte_flags(adev, abo->tbo.ttm, &abo->tbo.mem); - - offset = amdgpu_bo_gpu_offset(abo); - offset -= adev->mman.bdev.man[TTM_PL_TT].gpu_offset; - r = amdgpu_gart_bind(adev, offset, abo->tbo.num_pages, - NULL, dma_addr, flags); - kfree(dma_addr); - amdgpu_bo_unreserve(abo); - if (unlikely(r)) - goto release_object; - abo->tbo.mem.bus.base = args->addr; abo->tbo.mem.bus.offset = 0; + abo->tbo.mem.bus.addr = (void *)dma_addr; r = drm_gem_handle_create(filp, gobj, &handle); args->handle = handle; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index 8339fd4..67f1e3e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -41,15 +41,11 @@ static void amdgpu_ttm_bo_destroy(struct ttm_buffer_object *tbo) { struct amdgpu_device *adev = amdgpu_ttm_adev(tbo->bdev); struct amdgpu_bo *bo; - u64 offset; bo = container_of(tbo, struct amdgpu_bo, tbo); - if (bo->tbo.mem.mem_type == AMDGPU_PL_DGMA_IMPORT) { - offset = amdgpu_bo_gpu_offset(bo); - offset -= adev->mman.bdev.man[TTM_PL_TT].gpu_offset; - amdgpu_gart_unbind(adev, offset, bo->tbo.num_pages); - } + if (bo->tbo.mem.mem_type == AMDGPU_PL_DGMA_IMPORT) + kfree(tbo->mem.bus.addr); amdgpu_bo_kunmap(bo); if (bo->gem_base.import_attach) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 1e6fe46..f017951 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -597,6 +597,7 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_ mem->bus.is_iomem = true; break; case AMDGPU_PL_DGMA_IMPORT: + mem->bus.addr = backup.bus.addr; mem->bus.offset = backup.bus.offset; mem->bus.base = backup.bus.base; mem->bus.is_iomem = true; @@ -1237,11 +1238,7 @@ static int amdgpu_direct_gma_init(struct amdgpu_device *adev) struct ttm_mem_reg *mem = &adev->direct_gma.gart_mem; struct amdgpu_bo *abo; struct ttm_buffer_object gtt_bo; - struct ttm_place place = { - .fpfn = 0, - .lpfn = adev->mc.gart_size >> PAGE_SHIFT, - .flags = TTM_PL_FLAG_TOPDOWN - }; + struct ttm_place place = {0}; unsigned long size; int r; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index 531a2a1..c09da94 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -1711,16 +1711,14 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev, max_entries = (nodes->size - pfn) * (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); switch (mem->mem_type) { - case AMDGPU_PL_DGMA_IMPORT: - pages_addr = (dma_addr_t *)mem->bus.base; - addr += adev->mman.bdev.man[mem->mem_type].gpu_offset - - adev->mman.bdev.man[TTM_PL_TT].gpu_offset; - gtt_flags = flags; - /* fall through */ case TTM_PL_TT: max_entries = min(max_entries, 16ull * 1024ull); addr = 0; break; + case AMDGPU_PL_DGMA_IMPORT: + addr = 0; + max_entries = min(max_entries, 16ull * 1024ull); + break; case AMDGPU_PL_DGMA: addr += adev->vm_manager.vram_base_offset + adev->mman.bdev.man[mem->mem_type].gpu_offset - @@ -1797,7 +1795,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct ttm_dma_tt, ttm); pages_addr = ttm->dma_address; } else if (mem->mem_type == AMDGPU_PL_DGMA_IMPORT) { - pages_addr = (dma_addr_t *)bo_va->bo->tbo.mem.bus.base; + pages_addr = (dma_addr_t *)bo_va->base.bo->tbo.mem.bus.addr; } exclusive = reservation_object_get_excl(bo->tbo.resv); } diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index a97ee07..49eb2e1 100644 --- a/include/uapi/drm/amdgpu_drm.h +++ b/include/uapi/drm/amdgpu_drm.h @@ -212,10 +212,18 @@ union drm_amdgpu_ctx { union drm_amdgpu_ctx_out out; }; +/* sem related */ +#define AMDGPU_SEM_OP_CREATE_SEM 1 +#define AMDGPU_SEM_OP_WAIT_SEM 2 +#define AMDGPU_SEM_OP_SIGNAL_SEM 3 +#define AMDGPU_SEM_OP_DESTROY_SEM 4 +#define AMDGPU_SEM_OP_IMPORT_SEM 5 +#define AMDGPU_SEM_OP_EXPORT_SEM 6 + struct drm_amdgpu_sem_in { /** AMDGPU_SEM_OP_* */ uint32_t op; - int32_t fd; + int32_t handle; uint32_t ctx_id; uint32_t ip_type; uint32_t ip_instance; @@ -225,7 +233,7 @@ struct drm_amdgpu_sem_in { union drm_amdgpu_sem_out { int32_t fd; - uint32_t _pad; + uint32_t handle; }; union drm_amdgpu_sem { -- 2.7.4