From cdbca912692da473827b94bddc120f0052d8b2cc Mon Sep 17 00:00:00 2001 From: Leon Elazar Date: Tue, 17 Jan 2017 16:16:04 -0500 Subject: [PATCH 0162/4131] drm/amd/display: Add missing MI masks This will fix the memory Input programing with MST tiled display. This Fix should fix connectivity problems with MST tiled Display Signed-off-by: Leon Elazar Acked-by: Harry Wentland Reviewed-by: Tony Cheng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h index f90d586..ec053c2 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h @@ -92,6 +92,8 @@ struct dce_mem_input_registers { .field_name = blk_name ## reg_name ## __ ## field_name ## post_fix #define MI_GFX8_TILE_MASK_SH_LIST(mask_sh, blk)\ + SFB(blk, GRPH_CONTROL, GRPH_NUM_BANKS, mask_sh),\ + SFB(blk, GRPH_CONTROL, GRPH_BANK_WIDTH, mask_sh),\ SFB(blk, GRPH_CONTROL, GRPH_BANK_HEIGHT, mask_sh),\ SFB(blk, GRPH_CONTROL, GRPH_MACRO_TILE_ASPECT, mask_sh),\ SFB(blk, GRPH_CONTROL, GRPH_TILE_SPLIT, mask_sh),\ -- 2.7.4